Published in: Dagstuhl Seminar Proceedings, Volume 10281, Dynamically Reconfigurable Architectures (2010)
Peter M. Athanas, Jürgen Becker, Jürgen Teich, and Ingrid Verbauwhede. 10281 Abstracts Collection – Dynamically Reconfigurable Architectures. In Dynamically Reconfigurable Architectures. Dagstuhl Seminar Proceedings, Volume 10281, pp. 1-23, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2010)
@InProceedings{athanas_et_al:DagSemProc.10281.1, author = {Athanas, Peter M. and Becker, J\"{u}rgen and Teich, J\"{u}rgen and Verbauwhede, Ingrid}, title = {{10281 Abstracts Collection – Dynamically Reconfigurable Architectures}}, booktitle = {Dynamically Reconfigurable Architectures}, pages = {1--23}, series = {Dagstuhl Seminar Proceedings (DagSemProc)}, ISSN = {1862-4405}, year = {2010}, volume = {10281}, editor = {Peter M. Athanas and J\"{u}rgen Becker and J\"{u}rgen Teich and Ingrid Verbauwhede}, publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik}, address = {Dagstuhl, Germany}, URL = {https://drops-dev.dagstuhl.de/entities/document/10.4230/DagSemProc.10281.1}, URN = {urn:nbn:de:0030-drops-28962}, doi = {10.4230/DagSemProc.10281.1}, annote = {Keywords: Dynamically Run-Time Reconfigurable Computing Architectures, Self- adaptive Systems, Computational Models, Circuit Technologies, System Architecture, Reconfigurable/Adaptive Computing based on Nanotechnologies} }
Published in: Dagstuhl Seminar Proceedings, Volume 10281, Dynamically Reconfigurable Architectures (2010)
Jim Torresen and Dirk Koch. A new project to address run-time reconfigurable hardware systems. In Dynamically Reconfigurable Architectures. Dagstuhl Seminar Proceedings, Volume 10281, pp. 1-10, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2010)
@InProceedings{torresen_et_al:DagSemProc.10281.4, author = {Torresen, Jim and Koch, Dirk}, title = {{A new project to address run-time reconfigurable hardware systems}}, booktitle = {Dynamically Reconfigurable Architectures}, pages = {1--10}, series = {Dagstuhl Seminar Proceedings (DagSemProc)}, ISSN = {1862-4405}, year = {2010}, volume = {10281}, editor = {Peter M. Athanas and J\"{u}rgen Becker and J\"{u}rgen Teich and Ingrid Verbauwhede}, publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik}, address = {Dagstuhl, Germany}, URL = {https://drops-dev.dagstuhl.de/entities/document/10.4230/DagSemProc.10281.4}, URN = {urn:nbn:de:0030-drops-28943}, doi = {10.4230/DagSemProc.10281.4}, annote = {Keywords: } }
Published in: Dagstuhl Seminar Proceedings, Volume 10281, Dynamically Reconfigurable Architectures (2010)
Rene Cumplido, Juan Manuel Campos, Claudia Feregrino-Uribe, and Jose Roberto Perez-Andrade. Towards a reconfigurable hardware architecture for implementing a LDPC module suitable for software radio systems. In Dynamically Reconfigurable Architectures. Dagstuhl Seminar Proceedings, Volume 10281, pp. 1-8, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2010)
@InProceedings{cumplido_et_al:DagSemProc.10281.13, author = {Cumplido, Rene and Campos, Juan Manuel and Feregrino-Uribe, Claudia and Perez-Andrade, Jose Roberto}, title = {{Towards a reconfigurable hardware architecture for implementing a LDPC module suitable for software radio systems}}, booktitle = {Dynamically Reconfigurable Architectures}, pages = {1--8}, series = {Dagstuhl Seminar Proceedings (DagSemProc)}, ISSN = {1862-4405}, year = {2010}, volume = {10281}, editor = {Peter M. Athanas and J\"{u}rgen Becker and J\"{u}rgen Teich and Ingrid Verbauwhede}, publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik}, address = {Dagstuhl, Germany}, URL = {https://drops-dev.dagstuhl.de/entities/document/10.4230/DagSemProc.10281.13}, URN = {urn:nbn:de:0030-drops-28950}, doi = {10.4230/DagSemProc.10281.13}, annote = {Keywords: LDPC codes, Software Defined Radio, Hardware Implementation} }
Published in: Dagstuhl Seminar Proceedings, Volume 10281, Dynamically Reconfigurable Architectures (2010)
Peter M. Athanas, Jürgen Becker, Jürgen Teich, and Ingrid Verbauwhede. 10281 Summary – Dynamically Reconfigurable Architectures. In Dynamically Reconfigurable Architectures. Dagstuhl Seminar Proceedings, Volume 10281, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2010)
@InProceedings{athanas_et_al:DagSemProc.10281.2, author = {Athanas, Peter M. and Becker, J\"{u}rgen and Teich, J\"{u}rgen and Verbauwhede, Ingrid}, title = {{10281 Summary – Dynamically Reconfigurable Architectures}}, booktitle = {Dynamically Reconfigurable Architectures}, series = {Dagstuhl Seminar Proceedings (DagSemProc)}, ISSN = {1862-4405}, year = {2010}, volume = {10281}, editor = {Peter M. Athanas and J\"{u}rgen Becker and J\"{u}rgen Teich and Ingrid Verbauwhede}, publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik}, address = {Dagstuhl, Germany}, URL = {https://drops-dev.dagstuhl.de/entities/document/10.4230/DagSemProc.10281.2}, URN = {urn:nbn:de:0030-drops-28926}, doi = {10.4230/DagSemProc.10281.2}, annote = {Keywords: Dynamically Run-Time Reconfigurable Computing Architectures, Self- adaptive Systems, Computational Models, Circuit Technologies, System Architecture, CAD Tool Support, Reconfigurable/Adaptive Computing based on Nanotechnologies} }
Published in: Dagstuhl Seminar Proceedings, Volume 10281, Dynamically Reconfigurable Architectures (2010)
Gerard J. M. Smit, Jan Kuper, and Christiaan P. R. Baaij. A mathematical approach towards hardware design. In Dynamically Reconfigurable Architectures. Dagstuhl Seminar Proceedings, Volume 10281, pp. 1-11, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2010)
@InProceedings{smit_et_al:DagSemProc.10281.3, author = {Smit, Gerard J. M. and Kuper, Jan and Baaij, Christiaan P. R.}, title = {{A mathematical approach towards hardware design}}, booktitle = {Dynamically Reconfigurable Architectures}, pages = {1--11}, series = {Dagstuhl Seminar Proceedings (DagSemProc)}, ISSN = {1862-4405}, year = {2010}, volume = {10281}, editor = {Peter M. Athanas and J\"{u}rgen Becker and J\"{u}rgen Teich and Ingrid Verbauwhede}, publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik}, address = {Dagstuhl, Germany}, URL = {https://drops-dev.dagstuhl.de/entities/document/10.4230/DagSemProc.10281.3}, URN = {urn:nbn:de:0030-drops-28407}, doi = {10.4230/DagSemProc.10281.3}, annote = {Keywords: Hardware design, mathematical specification, streaming applications} }
Published in: Dagstuhl Seminar Proceedings, Volume 10281, Dynamically Reconfigurable Architectures (2010)
Dirk Koch. Advances in Component-based System Design and Partial Run-time Reconfiguration. In Dynamically Reconfigurable Architectures. Dagstuhl Seminar Proceedings, Volume 10281, pp. 1-9, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2010)
@InProceedings{koch:DagSemProc.10281.5, author = {Koch, Dirk}, title = {{Advances in Component-based System Design and Partial Run-time Reconfiguration}}, booktitle = {Dynamically Reconfigurable Architectures}, pages = {1--9}, series = {Dagstuhl Seminar Proceedings (DagSemProc)}, ISSN = {1862-4405}, year = {2010}, volume = {10281}, editor = {Peter M. Athanas and J\"{u}rgen Becker and J\"{u}rgen Teich and Ingrid Verbauwhede}, publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik}, address = {Dagstuhl, Germany}, URL = {https://drops-dev.dagstuhl.de/entities/document/10.4230/DagSemProc.10281.5}, URN = {urn:nbn:de:0030-drops-28410}, doi = {10.4230/DagSemProc.10281.5}, annote = {Keywords: FPGA design, partial reconfiguretion, component-based design} }
Published in: Dagstuhl Seminar Proceedings, Volume 10281, Dynamically Reconfigurable Architectures (2010)
Jens Huthmann, Peter Müller, Florian Stock, Dietmar Hildenbrand, and Andreas Koch. Compiling Geometric Algebra Computations into Reconfigurable Hardware Accelerators. In Dynamically Reconfigurable Architectures. Dagstuhl Seminar Proceedings, Volume 10281, pp. 1-15, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2010)
@InProceedings{huthmann_et_al:DagSemProc.10281.6, author = {Huthmann, Jens and M\"{u}ller, Peter and Stock, Florian and Hildenbrand, Dietmar and Koch, Andreas}, title = {{Compiling Geometric Algebra Computations into Reconfigurable Hardware Accelerators}}, booktitle = {Dynamically Reconfigurable Architectures}, pages = {1--15}, series = {Dagstuhl Seminar Proceedings (DagSemProc)}, ISSN = {1862-4405}, year = {2010}, volume = {10281}, editor = {Peter M. Athanas and J\"{u}rgen Becker and J\"{u}rgen Teich and Ingrid Verbauwhede}, publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik}, address = {Dagstuhl, Germany}, URL = {https://drops-dev.dagstuhl.de/entities/document/10.4230/DagSemProc.10281.6}, URN = {urn:nbn:de:0030-drops-28389}, doi = {10.4230/DagSemProc.10281.6}, annote = {Keywords: Geometric Algebra FPGA High-Level-Compiler Gaalop} }
Published in: Dagstuhl Seminar Proceedings, Volume 10281, Dynamically Reconfigurable Architectures (2010)
Norbert Abel. Design and Implementation of an Object-Oriented DPR-Framework. In Dynamically Reconfigurable Architectures. Dagstuhl Seminar Proceedings, Volume 10281, pp. 1-9, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2010)
@InProceedings{abel:DagSemProc.10281.7, author = {Abel, Norbert}, title = {{Design and Implementation of an Object-Oriented DPR-Framework}}, booktitle = {Dynamically Reconfigurable Architectures}, pages = {1--9}, series = {Dagstuhl Seminar Proceedings (DagSemProc)}, ISSN = {1862-4405}, year = {2010}, volume = {10281}, editor = {Peter M. Athanas and J\"{u}rgen Becker and J\"{u}rgen Teich and Ingrid Verbauwhede}, publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik}, address = {Dagstuhl, Germany}, URL = {https://drops-dev.dagstuhl.de/entities/document/10.4230/DagSemProc.10281.7}, URN = {urn:nbn:de:0030-drops-28365}, doi = {10.4230/DagSemProc.10281.7}, annote = {Keywords: FPGA, DPR, HLS, Object-Orientation} }
Published in: Dagstuhl Seminar Proceedings, Volume 10281, Dynamically Reconfigurable Architectures (2010)
Walter Stechele, Christopher Claus, and Andreas Laika. Lessons Learned from last 4 Years of Reconfigurable Computing. In Dynamically Reconfigurable Architectures. Dagstuhl Seminar Proceedings, Volume 10281, pp. 1-7, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2010)
@InProceedings{stechele_et_al:DagSemProc.10281.8, author = {Stechele, Walter and Claus, Christopher and Laika, Andreas}, title = {{Lessons Learned from last 4 Years of Reconfigurable Computing}}, booktitle = {Dynamically Reconfigurable Architectures}, pages = {1--7}, series = {Dagstuhl Seminar Proceedings (DagSemProc)}, ISSN = {1862-4405}, year = {2010}, volume = {10281}, editor = {Peter M. Athanas and J\"{u}rgen Becker and J\"{u}rgen Teich and Ingrid Verbauwhede}, publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik}, address = {Dagstuhl, Germany}, URL = {https://drops-dev.dagstuhl.de/entities/document/10.4230/DagSemProc.10281.8}, URN = {urn:nbn:de:0030-drops-28352}, doi = {10.4230/DagSemProc.10281.8}, annote = {Keywords: Reconfigurable computing, vision-based driver assistance} }
Published in: Dagstuhl Seminar Proceedings, Volume 10281, Dynamically Reconfigurable Architectures (2010)
Matthias Hanke, Tim Kranich, Mladen Berekovic, and Yannis Papaefstathiou. Low-Power Reconfigurable Architectures for High-Performance Mobile Nodes. In Dynamically Reconfigurable Architectures. Dagstuhl Seminar Proceedings, Volume 10281, pp. 1-7, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2010)
@InProceedings{hanke_et_al:DagSemProc.10281.9, author = {Hanke, Matthias and Kranich, Tim and Berekovic, Mladen and Papaefstathiou, Yannis}, title = {{Low-Power Reconfigurable Architectures for High-Performance Mobile Nodes}}, booktitle = {Dynamically Reconfigurable Architectures}, pages = {1--7}, series = {Dagstuhl Seminar Proceedings (DagSemProc)}, ISSN = {1862-4405}, year = {2010}, volume = {10281}, editor = {Peter M. Athanas and J\"{u}rgen Becker and J\"{u}rgen Teich and Ingrid Verbauwhede}, publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik}, address = {Dagstuhl, Germany}, URL = {https://drops-dev.dagstuhl.de/entities/document/10.4230/DagSemProc.10281.9}, URN = {urn:nbn:de:0030-drops-28370}, doi = {10.4230/DagSemProc.10281.9}, annote = {Keywords: Reconfiguration, ASIP, RASIP, low power, high performance, video encoding, encryption, wireless sensor node, mobile device} }
Published in: Dagstuhl Seminar Proceedings, Volume 10281, Dynamically Reconfigurable Architectures (2010)
Daniel Ziener and Jürgen Teich. New Directions for IP Core Watermarking and Identification. In Dynamically Reconfigurable Architectures. Dagstuhl Seminar Proceedings, Volume 10281, pp. 1-13, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2010)
@InProceedings{ziener_et_al:DagSemProc.10281.10, author = {Ziener, Daniel and Teich, J\"{u}rgen}, title = {{New Directions for IP Core Watermarking and Identification}}, booktitle = {Dynamically Reconfigurable Architectures}, pages = {1--13}, series = {Dagstuhl Seminar Proceedings (DagSemProc)}, ISSN = {1862-4405}, year = {2010}, volume = {10281}, editor = {Peter M. Athanas and J\"{u}rgen Becker and J\"{u}rgen Teich and Ingrid Verbauwhede}, publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik}, address = {Dagstuhl, Germany}, URL = {https://drops-dev.dagstuhl.de/entities/document/10.4230/DagSemProc.10281.10}, URN = {urn:nbn:de:0030-drops-28437}, doi = {10.4230/DagSemProc.10281.10}, annote = {Keywords: IP protection, IP cores, watermarking} }
Published in: Dagstuhl Seminar Proceedings, Volume 10281, Dynamically Reconfigurable Architectures (2010)
Nele Mentens, Jo Vliegen, An Braeken, Abdellah Touhafi, Karel Wouters, and Ingrid Verbauwhede. Secure remote reconfiguration of FPGAs. In Dynamically Reconfigurable Architectures. Dagstuhl Seminar Proceedings, Volume 10281, pp. 1-4, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2010)
@InProceedings{mentens_et_al:DagSemProc.10281.11, author = {Mentens, Nele and Vliegen, Jo and Braeken, An and Touhafi, Abdellah and Wouters, Karel and Verbauwhede, Ingrid}, title = {{Secure remote reconfiguration of FPGAs}}, booktitle = {Dynamically Reconfigurable Architectures}, pages = {1--4}, series = {Dagstuhl Seminar Proceedings (DagSemProc)}, ISSN = {1862-4405}, year = {2010}, volume = {10281}, editor = {Peter M. Athanas and J\"{u}rgen Becker and J\"{u}rgen Teich and Ingrid Verbauwhede}, publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik}, address = {Dagstuhl, Germany}, URL = {https://drops-dev.dagstuhl.de/entities/document/10.4230/DagSemProc.10281.11}, URN = {urn:nbn:de:0030-drops-28391}, doi = {10.4230/DagSemProc.10281.11}, annote = {Keywords: FPGA, cryptography, security, remote configuration} }
Published in: Dagstuhl Seminar Proceedings, Volume 10281, Dynamically Reconfigurable Architectures (2010)
Xiaolei Chen and Yajun Ha. The Optimization of Interconnection Networks in FPGAs. In Dynamically Reconfigurable Architectures. Dagstuhl Seminar Proceedings, Volume 10281, pp. 1-9, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2010)
@InProceedings{chen_et_al:DagSemProc.10281.12, author = {Chen, Xiaolei and Ha, Yajun}, title = {{The Optimization of Interconnection Networks in FPGAs}}, booktitle = {Dynamically Reconfigurable Architectures}, pages = {1--9}, series = {Dagstuhl Seminar Proceedings (DagSemProc)}, ISSN = {1862-4405}, year = {2010}, volume = {10281}, editor = {Peter M. Athanas and J\"{u}rgen Becker and J\"{u}rgen Teich and Ingrid Verbauwhede}, publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik}, address = {Dagstuhl, Germany}, URL = {https://drops-dev.dagstuhl.de/entities/document/10.4230/DagSemProc.10281.12}, URN = {urn:nbn:de:0030-drops-28425}, doi = {10.4230/DagSemProc.10281.12}, annote = {Keywords: Field-programmable gate array, architecture, computer-aided design} }
Published in: Dagstuhl Seminar Proceedings, Volume 10281, Dynamically Reconfigurable Architectures (2010)
Branislav Hredzak and Oliver Diessel. Towards Dilated Placement of Dynamic NoC Cores. In Dynamically Reconfigurable Architectures. Dagstuhl Seminar Proceedings, Volume 10281, pp. 1-18, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2010)
@InProceedings{hredzak_et_al:DagSemProc.10281.14, author = {Hredzak, Branislav and Diessel, Oliver}, title = {{Towards Dilated Placement of Dynamic NoC Cores}}, booktitle = {Dynamically Reconfigurable Architectures}, pages = {1--18}, series = {Dagstuhl Seminar Proceedings (DagSemProc)}, ISSN = {1862-4405}, year = {2010}, volume = {10281}, editor = {Peter M. Athanas and J\"{u}rgen Becker and J\"{u}rgen Teich and Ingrid Verbauwhede}, publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik}, address = {Dagstuhl, Germany}, URL = {https://drops-dev.dagstuhl.de/entities/document/10.4230/DagSemProc.10281.14}, URN = {urn:nbn:de:0030-drops-28344}, doi = {10.4230/DagSemProc.10281.14}, annote = {Keywords: Modular reconfiguration, networks-on-chip, application mapping, dilation} }
Published in: Dagstuhl Seminar Proceedings, Volume 6141, Dynamically Reconfigurable Architectures (2006)
Jürgen Becker, Jürgen Teich, Gordon Brebner, and Peter M. Athanas. 06141 Abstracts Collection – Dynamically Reconfigurable Architectures. In Dynamically Reconfigurable Architectures. Dagstuhl Seminar Proceedings, Volume 6141, pp. 1-26, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2006)
@InProceedings{becker_et_al:DagSemProc.06141.1, author = {Becker, J\"{u}rgen and Teich, J\"{u}rgen and Brebner, Gordon and Athanas, Peter M.}, title = {{06141 Abstracts Collection – Dynamically Reconfigurable Architectures}}, booktitle = {Dynamically Reconfigurable Architectures}, pages = {1--26}, series = {Dagstuhl Seminar Proceedings (DagSemProc)}, ISSN = {1862-4405}, year = {2006}, volume = {6141}, editor = {Peter M. Athanas and J\"{u}rgen Becker and Gordon Brebner and J\"{u}rgen Teich}, publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik}, address = {Dagstuhl, Germany}, URL = {https://drops-dev.dagstuhl.de/entities/document/10.4230/DagSemProc.06141.1}, URN = {urn:nbn:de:0030-drops-8383}, doi = {10.4230/DagSemProc.06141.1}, annote = {Keywords: Dynamically run-time reconfigurable computing architectures, adaptive systems, computational models, circuit technologies, system architecture, CAD tool support} }
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