No. Title Author Year
1 Bounded Depth Circuits with Weighted Symmetric Gates: Satisfiability, Lower Bounds and Compression Sakai, Takayuki et al. 2016
2 Circuit Size Lower Bounds and #SAT Upper Bounds Through a General Framework Golovnev, Alexander et al. 2016
3 Improved Exact Algorithms for Mildly Sparse Instances of Max SAT Sakai, Takayuki et al. 2015
4 Robust Approximation of Temporal CSP Tamaki, Suguru et al. 2014
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