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Jeitler, Marcus ;
Lechner, Jakob
Towards Comparing the Robustness of Synchronous and Asynchronous Circuits by Fault Injection
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Abstract
As transient error rates are growing due to smaller feature sizes,
designing reliable synchronous circuits becomes increasingly
challenging. Asynchronous logic design constitutes a promising
alternative with respect to robustness and stability. In particular,
delay-insensitive asynchronous circuits provide interesting properties,
like an inherent resilience to delay-faults.BibTeX - Entry
@InProceedings{jeitler_et_al:OASIcs:2009:2352,
author = {Marcus Jeitler and Jakob Lechner},
title = {{Towards Comparing the Robustness of Synchronous and Asynchronous Circuits by Fault Injection}},
booktitle = {Annual Doctoral Workshop on Mathematical and Engineering Methods in Computer Science (MEMICS'09)},
pages = {94--103},
series = {OpenAccess Series in Informatics (OASIcs)},
ISBN = {978-3-939897-15-6},
ISSN = {2190-6807},
year = {2009},
volume = {13},
editor = {Petr Hlinen{\'y} and V{\'a}clav Maty{\'a}{\v{s}} and Tom{\'a}{\v{s}} Vojnar},
publisher = {Schloss Dagstuhl--Leibniz-Zentrum fuer Informatik},
address = {Dagstuhl, Germany},
URL = {http://drops.dagstuhl.de/opus/volltexte/2009/2352},
URN = {urn:nbn:de:0030-drops-23529},
doi = {http://dx.doi.org/10.4230/DROPS.MEMICS.2009.2352},
annote = {Keywords: Four State Logic, Asynchronous Design, Fault Injection, Fault Tolerance}
}
Keywords:
Four State Logic, Asynchronous Design, Fault Injection, Fault Tolerance
Seminar:
Annual Doctoral Workshop on Mathematical and Engineering Methods in Computer Science (MEMICS'09)
Issue Date:
2009
Date of publication:
15.12.2009