License
When quoting this document, please refer to the following
URN: urn:nbn:de:0030-drops-24032
URL: http://drops.dagstuhl.de/opus/volltexte/2010/2403/
Go to the corresponding Portal


Schaumont, Patrick

Engineering On-Chip Thermal Effects

pdf-format:
Document 1.pdf (138 KB)


Abstract

Temperature effects can be used to maliciously affect the behavior of digital crypto-circuits. For example, temperature effects can create covert communication channels, and they can affect the stability of physical unclonable functions (PUFs). This talk observes that these thermal effects can be engineered, and we describe two techniques. The first technique shows how to filter the information through a covert temperature channel. This leads to detectors for very specific events, for example, someone touching the chip package. The second technique shows how to mitigate the impact of temperature on a PUF design while avoiding costly post-processing. We discuss the design of a compact ring-oscillator PUF for FPGA which is tolerant to temperature variations.

BibTeX - Entry

@InProceedings{schaumont:DSP:2010:2403,
  author =	{Patrick Schaumont},
  title =	{Engineering On-Chip Thermal Effects},
  booktitle =	{Foundations for Forgery-Resilient Cryptographic Hardware},
  year =	{2010},
  editor =	{Jorge Guajardo and Bart Preneel and Ahmad-Reza Sadeghi and Pim Tuyls},
  number =	{09282},
  series =	{Dagstuhl Seminar Proceedings},
  ISSN =	{1862-4405},
  publisher =	{Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik, Germany},
  address =	{Dagstuhl, Germany},
  URL =		{http://drops.dagstuhl.de/opus/volltexte/2010/2403},
  annote =	{Keywords: PUFs, temperature effects, covert temperature channel, ring oscillator PUF, FPGAs}
}

Keywords: PUFs, temperature effects, covert temperature channel, ring oscillator PUF, FPGAs
Seminar: 09282 - Foundations for Forgery-Resilient Cryptographic Hardware
Issue Date: 2010
Date of publication: 13.01.2010


DROPS-Home | Fulltext Search | Imprint Published by LZI