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URN: urn:nbn:de:0030-drops-13724
URL: http://drops.dagstuhl.de/opus/volltexte/2008/1372/

O'Donnell, John

Parallelism through Digital Circuit Design

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Abstract

Two ways to exploit chips with a very large number of transistors are multicore processors and programmable logic chips. Some data parallel algorithms can be executed efficiently on ordinary parallel computers, including multicores. A class of data parallel algorithms is identified which have characteristics that make implementation on multiprocessors inefficient, but they are well suited for direct design as digital circuits. This leads to a programming model called circuit parallelism. The characteristics of circuit parallel algorithms are discussed, and a prototype system for supporting them is described.

BibTeX - Entry

@InProceedings{odonnell:DSP:2008:1372,
  author =	{John O'Donnell},
  title =	{Parallelism through Digital Circuit Design},
  booktitle =	{Programming Models for Ubiquitous Parallelism},
  year =	{2008},
  editor =	{Albert Cohen and Mar{\'i}a J. Garzar{\'a}n and Christian Lengauer and Samuel P. Midkiff},
  number =	{07361},
  series =	{Dagstuhl Seminar Proceedings},
  ISSN =	{1862-4405},
  publisher =	{Internationales Begegnungs- und Forschungszentrum f{\"u}r Informatik (IBFI), Schloss Dagstuhl, Germany},
  address =	{Dagstuhl, Germany},
  URL =		{http://drops.dagstuhl.de/opus/volltexte/2008/1372},
  annote =	{Keywords: Circuit parallelism, data parallelism, FPGA}
}

Keywords: Circuit parallelism, data parallelism, FPGA
Seminar: 07361 - Programming Models for Ubiquitous Parallelism
Issue date: 2008
Date of publication: 06.02.2008


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