System-Level Infrastructure for HW/SW Dataset E-xtraction

SLIDE-x is an open-source Python tool that facilitates the System-Level HW/SW Co-Design of embedded systems and Cyber-Physical Systems (CPSs) through the creation of datasets useful for analysis, comparison, and simulations/predictions. These datasets can be used to evaluate HW/SW performance, select the most suitable embedded platform, and perform HW/SW trade-off analysis.

SLIDE-x consists of the following components:

1. SLIDE-x-BENCH: Extensible C-based benchmark component for evaluating HW/SW performance;
2. SLIDE-x-CORE: The SLIDE-x core engine component:
   • SLIDE-x-Data: Extensible Python Data-driven component, where designers can (semi)automatically generate inputs for the benchmark functions. The function parameters are specified in a JSON file (cmds.json) contained in the same directory of the function. The component reads a range [x; y] used to generate the values of the parameters and the number of inputs to be created. Finally, for each function, different data types have been considered (i.e., int8, int16, int32, int64, float, and double) to analyze the results for the internal architecture of the considered processor.
   • SLIDE-x-Code: Extensible Python Code-driven component, where several code-oriented metrics are extracted by profiling the benchmark functions using the gcov and frama-c tools for each generated input. It is worth noting that such profiling is performed one-shot on the host platform since it is independent of the target processor technologies.
   • SLIDE-x-Sim: Extensible Python HW/SW Simulation-driven component, where designers can execute the benchmark C function using several simulators for different processors. The component saves metrics related to the number of clock cycles, instructions executed, cache miss/hit/access, etc. Depending on the processor technology, an Instruction Set Simulator (ISS) or an HDL Simulator is needed, such as:
     • SLIDE-x-HLS Integration with High-Level Synthesis (HLS) tools such as Bambu, Vitis-HLS, and LegUP.
     • SLIDE-x-ISS Integration with Instruction Set Simulators (ISS) such as TSIM, Armulator, Thumbulator, Dalton SDCC/ISASIM, SimulAVR, Spike 64-bit RISC-V, x86-64 with Perf.
3. SLIDE-x-RES: Result datasets generated during the Profiling/Simulation activities;

SLIDE-x supports synthesis for FPGAs through the SLIDE-x-FPGA parser and System-on-Chips (SoCs) through the SLIDE-x-SoC parser. Application-Specific Integrated Circuit (ASIC) support is under development.

SLIDE-x can be used to enhance Systel-Level HW/SW Co-Design methodologies, frameworks, and tools functionalities such as HEPSYCODE, a System-Level methodology and tool for HW/SW CO-DEsign of HEterogeneous Parallel dedicated SYstems. The enhanced version is called HEPSYCODE-x. SLIDE-x can be also used to define metrics for Design Space Exploration (DSE) of embedded systems and CPSs. It has been used in HEPSYCODE to improve the Partitioning, Architecture definition, and Mapping (PAM) DSE tool. The improved version, called PAM-x uses GIMPLE-SSA-OPTIMIZED intermediate representations (IR).

SLIDE-x has been used in the following projects:

1. SLIDE-x-ML: Results with Bambu HLS on various FPGAs (i.e., Stratix-V, Artix-7, Virtex-7, Zynq-700) were used to predict the performance of C functions synthesized as HW components. The project is accessible at the following link: https://github.com/hepsycode/SLIDE-x-ML-ICCD

www.HEPSYCODE.com

SLIDE-x is open-source and freely available on GitHub: https://github.com/hepsycode/SLIDE-x.

The installation of the framework goes through a few simple steps. All that is required is to install the tools exploited by the framework at each step: Profiling (i.e., gcov), Static Analysis (i.e., Frama-c), and Simulation (i.e., ISS/HLS). For a deeper insight into the commands executed to perform each phase, the user can look at the /SLIDE-x-CORE/src/cmds.json file.

The framework is implemented in Python3 and uses the csv, os, shutil, subprocess, tkinter libraries for internal operations. Thus, Python3 and the above-listed libraries should be installed for the framework to run properly.

The profiling phase requires the execution of gcc and gcov.

This step requires the frama-c software analyzer.

The simulation phase involves the execution of the toolchain for each processor supported by the framework. The following is a description of each supported processor and the tools needed to get the information required to extract HW/SW metrics:

• Atmel AVR family:

  • simulavr: the instruction set simulator of the Atmel AVR family;
  • avr-gcc: the cross-compiler for the AVR ISA;

• LEON3:

  • tsim-leon3: the instruction set simulator for the LEON3;
  • sparc-gaisler-elf-gcc: the cross-compiler for the SPARC ISA;

• Intel MCS-51 (8051):

  • sdcc: the cross-compiler for the 8051;
  • isasim: the simulator of the 8051;
  • isasim zip files: 8051 ISS zip package;

• ARM:

  • arm-none-eabi-gcc: the cross-compiler for the ARM architecture;
  • Thumbulator:
    • thumbulator: the cycle-accurate ARMv6-M (Cortex-M0) simulator;
  • Armulator:
    • armulator: the ARM v4T simulator;

• RISC-V:

  • riscv64-unknown-elf-gcc: the cross-compiler for the RiscV;
  • Spike: the Spike RISC-V ISA Simulator (Functional);

• Bambu HLS:

  • PandA-bambu: PandA Bambu HLS Framework;

Latest Release: 2.0.0

GNU GENERAL PUBLIC LICENSE Version 3, 29 June 2007 (see https://www.gnu.org/licenses/gpl-3.0.en.html)

Source Repositories: https://github.com/hepsycode/SLIDE-x

• Clone:
  • ssh: git@github.com:hepsycode/SLIDE-x.git
  • https: https://github.com/hepsycode/SLIDE-x.git

You can use the code from these repositories to experiment, test, build, and create patches, and issue pull requests (only by request). For any bug or doubt, contact us or open an issue.

We currently support:

1. Email:
   • Vittoriano Muttillo:
     • vittoriano.muttillo@guest.univaq.it,
     • vmuttillo@unite.it
     • vittoriano.muttillo@gmail.com
   • Vincenzo Stoico:
     • v.stoico@vu.nl
   • (please take care to use [SLICE-x SUPPORT] as object
2. Issues on GitHub

Research publications are available at https://hepsycode.github.io/ and http://www.pomante.net/sito_gg/Publications.htm