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Parallelism through Digital Circuit Design O'Donnell, John Circuit parallelism data parallelism FPGA Two ways to exploit chips with a very large number of transistors are multicore processors and programmable logic chips. Some data parallel algorithms can be executed efficiently on ordinary parallel computers, including multicores. A class of data parallel algorithms is identified which have characteristics that make implementation on multiprocessors inefficient, but they are well suited for direct design as digital circuits. This leads to a programming model called circuit parallelism. The characteristics of circuit parallel algorithms are discussed, and a prototype system for supporting them is described. Schloss Dagstuhl – Leibniz-Zentrum für Informatik John O'Donnell 2008 Is Part Of Dagstuhl Seminar Proceedings, Volume 7361, Programming Models for Ubiquitous Parallelism (2008) InProceedings Text doc-type:ResearchArticle publishedVersion application/pdf doi:10.4230/DagSemProc.07361.4 urn:nbn:de:0030-drops-13724 https://drops.dagstuhl.de/entities/document/10.4230/DagSemProc.07361.4 eng https://creativecommons.org/licenses/by/4.0/legalcode