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        <identifier>oai:drops-oai.dagstuhl.de:1451</identifier>
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          <dc:title>Second Note on Basic Interval Arithmetic for IEEE754R</dc:title>
          <dc:creator>Pryce, John D.</dc:creator>
          <dc:creator>Corliss, George C.</dc:creator>
          <dc:creator>Kearfott, R. Baker</dc:creator>
          <dc:creator>Nedialkov, Ned S.</dc:creator>
          <dc:creator>Smith, Spencer</dc:creator>
          <dc:subject>Interval arithmetic</dc:subject>
          <dc:subject>validated computation</dc:subject>
          <dc:subject>floating point</dc:subject>
          <dc:subject>standards</dc:subject>
          <dc:subject>exceptions</dc:subject>
          <dc:subject>not an interval</dc:subject>
          <dc:description>The IFIP Working Group 2.5 on Numerical Software (IFIPWG2.5) wrote on 5th Septem- &#13;
ber 2007 to the IEEE Standards Committee concerned with revising the IEEE Floating- &#13;
Point Arithmetic Standards 754 and 854 (IEEE754R), expressing the unanimous &#13;
request of IFIPWG2.5 that the following requirement be included in the future computer &#13;
arithmetic standard: &#13;
&#13;
  For the data format double precision, interval arithmetic should be made &#13;
  available at the speed of simple floating-point arithmetic. &#13;
&#13;
IEEE754R (we believe) welcomed this development. They had before them a document &#13;
defining interval arithmetic operations but, to be the basis of a standards document, it &#13;
needed more detail. Members of the Interval Subroutine Library (ISL) team were asked &#13;
to comment, in an email from Ulrich Kulisch that enclosed one from Jim Demmel to Van &#13;
Snyder raising the issue. This paper provides ISL's comments.</dc:description>
          <dc:publisher>Schloss Dagstuhl – Leibniz-Zentrum für Informatik</dc:publisher>
          <dc:contributor>John D. Pryce and George C. Corliss and R. Baker Kearfott and Ned S. Nedialkov and Spencer Smith</dc:contributor>
          <dc:date>2008</dc:date>
          <dc:relation>Is Part Of Dagstuhl Seminar Proceedings, Volume 8021, Numerical Validation in Current Hardware Architectures (2008)</dc:relation>
          <dc:type>InProceedings</dc:type>
          <dc:type>Text</dc:type>
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          <dc:identifier>doi:10.4230/DagSemProc.08021.18</dc:identifier>
          <dc:identifier>urn:nbn:de:0030-drops-14517</dc:identifier>
          <dc:identifier>https://drops.dagstuhl.de/entities/document/10.4230/DagSemProc.08021.18</dc:identifier>
          <dc:language>eng</dc:language>
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