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        <identifier>oai:drops-oai.dagstuhl.de:17725</identifier>
        <datestamp>2024-03-06T10:31:54Z</datestamp>
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          <dc:title>MonTM: Monitoring-Based Thermal Management for Mixed-Criticality Systems</dc:title>
          <dc:creator>Mettler, Marcel</dc:creator>
          <dc:creator>Rapp, Martin</dc:creator>
          <dc:creator>Khdr, Heba</dc:creator>
          <dc:creator>Mueller-Gritschneder, Daniel</dc:creator>
          <dc:creator>Henkel, Jörg</dc:creator>
          <dc:creator>Schlichtmann, Ulf</dc:creator>
          <dc:subject>Dynamic thermal management</dc:subject>
          <dc:subject>mixed-criticality</dc:subject>
          <dc:subject>monitoring</dc:subject>
          <dc:description>With a rapidly growing functionality of embedded real-time applications, it becomes inevitable to integrate tasks of different safety integrity levels on one many-core processor leading to a large-scale mixed-criticality system. In this process, it is not sufficient to only isolate shared architectural resources, as different tasks executing on different cores also possibly interfere via the many-core processor’s thermal management. This can possibly lead to best-effort tasks causing deadline violations for safety-critical tasks. In order to prevent such a scenario, we propose a monitoring-based hardware extension that communicates imminent thermal violations between cores via a lightweight interconnect. Building on this infrastructure, we propose a thermal strategy such that best-effort tasks can be throttled in favor of safety-critical tasks. Furthermore, assigning static voltage/frequency (V/f) levels to each safety-critical task based on their worst-case execution time may result in unnecessary high V/f levels when the actual execution finishes faster. To free the otherwise wasted thermal resources, our solution monitors the progress of safety-critical tasks to detect slack and safely reduce their V/f levels. This increases the thermal headroom for best-effort tasks, boosting their performance. In our evaluation, we demonstrate our approach on an 80-core processor to show that it satisfies the thermal and deadline requirements, and simultaneously reduces the run-time of best-effort tasks by up to 45% compared to the state of the art.</dc:description>
          <dc:publisher>Schloss Dagstuhl – Leibniz-Zentrum für Informatik</dc:publisher>
          <dc:contributor>Marcel Mettler and Martin Rapp and Heba Khdr and Daniel Mueller-Gritschneder and Jörg Henkel and Ulf Schlichtmann</dc:contributor>
          <dc:date>2023</dc:date>
          <dc:relation>Is Part Of OASIcs, Volume 107, 14th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 12th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms (PARMA-DITAM 2023)</dc:relation>
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          <dc:identifier>doi:10.4230/OASIcs.PARMA-DITAM.2023.5</dc:identifier>
          <dc:identifier>urn:nbn:de:0030-drops-177250</dc:identifier>
          <dc:identifier>https://drops.dagstuhl.de/entities/document/10.4230/OASIcs.PARMA-DITAM.2023.5</dc:identifier>
          <dc:language>eng</dc:language>
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