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        <identifier>oai:drops-oai.dagstuhl.de:18244</identifier>
        <datestamp>2024-03-06T11:05:19Z</datestamp>
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          <dc:title>Wiring Circuits Is Easy as {0, 1, ω}, or Is It... (Artifact)</dc:title>
          <dc:creator>de Muijnck-Hughes, Jan</dc:creator>
          <dc:creator>Vanderbauwhede, Wim</dc:creator>
          <dc:subject>Hardware Design</dc:subject>
          <dc:subject>Linear Types</dc:subject>
          <dc:subject>Dependent Types</dc:subject>
          <dc:subject>DSLs</dc:subject>
          <dc:subject>Idris</dc:subject>
          <dc:subject>SystemVerilog</dc:subject>
          <dc:subject>Netlists</dc:subject>
          <dc:description>We present two proof-of-concept languages (Circuits &amp; CirQTS) that showcases how fancy types (namely linear &amp; dependent types) can enrich hardware design tooling such that we can move existing external static analysis checks into the language’s type-system. Using our approach will lead to the enhanced safety of designs, and increase in design productivity, through early identification and reduction of connection errors.&#13;
This artefact presents our verified implementations (as realised in Idris2) of the simply (Circuits) and fancily typed (CirQTS) languages, and the test suite used to assess efficacy of our approach.</dc:description>
          <dc:publisher>Schloss Dagstuhl – Leibniz-Zentrum für Informatik</dc:publisher>
          <dc:contributor>Jan de Muijnck-Hughes and Wim Vanderbauwhede</dc:contributor>
          <dc:date>2023</dc:date>
          <dc:relation>Is Part Of DARTS, Volume 9, Issue 2, Special Issue of the 37th European Conference on Object-Oriented Programming (ECOOP 2023)</dc:relation>
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          <dc:identifier>doi:10.4230/DARTS.9.2.4</dc:identifier>
          <dc:identifier>urn:nbn:de:0030-drops-182442</dc:identifier>
          <dc:identifier>https://drops.dagstuhl.de/entities/document/10.4230/DARTS.9.2.4</dc:identifier>
          <dc:language>eng</dc:language>
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