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        <identifier>oai:drops-oai.dagstuhl.de:2403</identifier>
        <datestamp>2024-03-06T11:08:53Z</datestamp>
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          <dc:title>Engineering On-Chip Thermal Effects</dc:title>
          <dc:creator>Schaumont, Patrick</dc:creator>
          <dc:subject>PUFs</dc:subject>
          <dc:subject>temperature effects</dc:subject>
          <dc:subject>covert temperature channel</dc:subject>
          <dc:subject>ring oscillator PUF</dc:subject>
          <dc:subject>FPGAs</dc:subject>
          <dc:description>Temperature effects can be used to maliciously affect the behavior of&#13;
digital crypto-circuits. For example, temperature effects can create&#13;
covert communication channels, and they can affect the stability of&#13;
physical unclonable functions (PUFs). This talk observes that these&#13;
thermal effects can be engineered, and we describe two techniques. The&#13;
first technique shows how to filter the information through a covert&#13;
temperature channel. This leads to detectors for very specific events,&#13;
for example, someone touching the chip package. The second technique&#13;
shows how to mitigate the impact of temperature on a PUF design while&#13;
avoiding costly post-processing. We discuss the design of a compact&#13;
ring-oscillator PUF for FPGA which is tolerant to temperature&#13;
variations.</dc:description>
          <dc:publisher>Schloss Dagstuhl – Leibniz-Zentrum für Informatik</dc:publisher>
          <dc:contributor>Patrick Schaumont</dc:contributor>
          <dc:date>2010</dc:date>
          <dc:relation>Is Part Of Dagstuhl Seminar Proceedings, Volume 9282, Foundations for Forgery-Resilient Cryptographic Hardware (2010)</dc:relation>
          <dc:type>InProceedings</dc:type>
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          <dc:identifier>doi:10.4230/DagSemProc.09282.5</dc:identifier>
          <dc:identifier>urn:nbn:de:0030-drops-24032</dc:identifier>
          <dc:identifier>https://drops.dagstuhl.de/entities/document/10.4230/DagSemProc.09282.5</dc:identifier>
          <dc:language>eng</dc:language>
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