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Fast, predictable and low energy memory references through architecture-aware compilation Marwedel, Peter Wehmeyer, Lars Verma, Manish Steinke, Stefan Helmig, Urs Embedded system compiler energy efficiency low power WCET scratchpad memory access The design of future high-performance embedded systems is hampered by two problems: First, the required hardware needs more energy than is available from batteries. Second, current cache-based approaches for bridging the increasing speed gap between processors and memories cannot guarantee predictable real-time behavior. A contribution to solving both problems is made in this paper which describes a comprehensive set of algorithms that can be applied at design time in order to maximally exploit scratch pad memories (SPMs). We show that both the energy consumption as well as the computed worst case execution time (WCET) can be reduced by up to to 80% and 48%, respectively, by establishing a strong link between the memory architecture and the compiler. Schloss Dagstuhl – Leibniz-Zentrum für Informatik Peter Marwedel and Lars Wehmeyer and Manish Verma and Stefan Steinke and Urs Helmig 2004 Is Part Of Dagstuhl Seminar Proceedings, Volume 3471, Perspectives Workshop: Design of Systems with Predictable Behaviour (2004) InProceedings Text doc-type:ResearchArticle publishedVersion application/pdf doi:10.4230/DagSemProc.03471.3 urn:nbn:de:0030-drops-66 https://drops.dagstuhl.de/entities/document/10.4230/DagSemProc.03471.3 eng https://creativecommons.org/licenses/by/4.0/legalcode