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Step Optimal Implementations of Large Single-Writer Registers Chen, Tian Ze Wei, Yuanhao atomic register regular register wait-free implementation single writer optimal We present two wait-free algorithms for simulating an l-bit single-writer register from k-bit single-writer registers, for any k >= 1. Our first algorithm has big-theta(l/k) step complexity for both Read and Write and uses big-theta (4^(l-k)) registers. An interesting feature of the algorithm is that Read operations do not write to shared variables. Our second algorithm has big-theta (l/k + (log n)/k) step complexity for both Read and Write, where n is the number of readers, but uses only big-theta (nl/k + n(log n)/k) registers. Combining both algorithms gives an implementation with big-theta (l/k) step complexity using big-theta (nl/k) space for any 1 <= k < l. We also prove that any implementation with big-O (l/k) step complexity for Read requires big-omega (l/k) step complexity for Write. Since reading l-bits requires at least ceiling(l/k) reads of k-bit registers, our lower bound shows that our implementation is step optimal. Schloss Dagstuhl – Leibniz-Zentrum für Informatik Tian Ze Chen and Yuanhao Wei 2017 Is Part Of LIPIcs, Volume 70, 20th International Conference on Principles of Distributed Systems (OPODIS 2016) InProceedings Text doc-type:ResearchArticle publishedVersion application/pdf doi:10.4230/LIPIcs.OPODIS.2016.32 urn:nbn:de:0030-drops-71010 https://drops.dagstuhl.de/entities/document/10.4230/LIPIcs.OPODIS.2016.32 eng https://creativecommons.org/licenses/by/3.0/legalcode