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          <dc:title>Whole-System WCEC Analysis for Energy-Constrained Real-Time Systems (Artifact)</dc:title>
          <dc:creator>Wägemann, Peter</dc:creator>
          <dc:creator>Dietrich, Christian</dc:creator>
          <dc:creator>Distler, Tobias</dc:creator>
          <dc:creator>Ulbrich, Peter</dc:creator>
          <dc:creator>Schröder-Preikschat, Wolfgang</dc:creator>
          <dc:subject>energy-constrained real-time systems</dc:subject>
          <dc:subject>worst-case energy consumption (WCEC)</dc:subject>
          <dc:subject>worst-case response energy consumption (WCRE)</dc:subject>
          <dc:subject>static whole-system analysi</dc:subject>
          <dc:description>Although internal devices (e.g., memory, timers) and external devices (e.g., sensors, transceivers) significantly contribute to the energy consumption of an embedded real-time system, their impact on the worst-case response energy consumption (WCRE) of tasks is usually not adequately taken into account.&#13;
Most WCRE analysis techniques only focus on the processor and neglect the energy consumption of other hardware units that are temporarily activated and deactivated in the system.&#13;
&#13;
To solve the problem of system-wide energy-consumption analysis, we present SysWCEC, an approach that addresses these problems by enabling static WCRE analysis for entire real-time systems, including internal as well as external devices.&#13;
For this purpose, SysWCEC introduces a novel abstraction, the power-state--transition graph, which contains information about the worst-case energy consumption of all possible execution paths.&#13;
To construct the graph, SysWCEC decomposes the analyzed real-time system into blocks during which the set of active devices in the system does not change and is consequently able to precisely handle devices being dynamically activated or deactivated.&#13;
&#13;
In this artifact evaluation, which accompanies our related conference paper, we present easy to reproduce WCRE analyses with the SysWCEC framework using several benchmarks.&#13;
The artifact comprises the generation of the power-state--transition graph from a given benchmark system and the formulation of an integer linear program whose solution eventually yields safe WCRE bounds.</dc:description>
          <dc:publisher>Schloss Dagstuhl – Leibniz-Zentrum für Informatik</dc:publisher>
          <dc:contributor>Peter Wägemann and Christian Dietrich and Tobias Distler and Peter Ulbrich and Wolfgang Schröder-Preikschat</dc:contributor>
          <dc:date>2018</dc:date>
          <dc:relation>Is Part Of DARTS, Volume 4, Issue 2, Special Issue of the 30th Euromicro Conference on Real-Time Systems (ECRTS 2018)</dc:relation>
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          <dc:identifier>doi:10.4230/DARTS.4.2.7</dc:identifier>
          <dc:identifier>urn:nbn:de:0030-drops-89756</dc:identifier>
          <dc:identifier>https://drops.dagstuhl.de/entities/document/10.4230/DARTS.4.2.7</dc:identifier>
          <dc:language>eng</dc:language>
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