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        <datestamp>2024-03-12T11:57:52Z</datestamp>
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          <dc:title>Deterministic Memory Abstraction and Supporting Multicore System Architecture</dc:title>
          <dc:creator>Farshchi, Farzad</dc:creator>
          <dc:creator>Valsan, Prathap Kumar</dc:creator>
          <dc:creator>Mancuso, Renato</dc:creator>
          <dc:creator>Yun, Heechul</dc:creator>
          <dc:subject>multicore processors</dc:subject>
          <dc:subject>real-time</dc:subject>
          <dc:subject>shared cache</dc:subject>
          <dc:subject>DRAM controller</dc:subject>
          <dc:subject>Linux</dc:subject>
          <dc:description>Poor time predictability of multicore processors has been a long-standing challenge in the real-time systems community. In this paper, we make a case that a fundamental problem that prevents efficient and predictable real-time computing on multicore is the lack of a proper memory abstraction to express memory criticality, which cuts across various layers of the system: the application, OS, and hardware. We, therefore, propose a new holistic resource management approach driven by a new memory abstraction, which we call Deterministic Memory. The key characteristic of deterministic memory is that the platform-the OS and hardware-guarantees small and tightly bounded worst-case memory access timing. In contrast, we call the conventional memory abstraction as best-effort memory in which only highly pessimistic worst-case bounds can be achieved. We propose to utilize both abstractions to achieve high time predictability but without significantly sacrificing performance. We present deterministic memory-aware OS and architecture designs, including OS-level page allocator, hardware-level cache, and DRAM controller designs. We implement the proposed OS and architecture extensions on Linux and gem5 simulator. Our evaluation results, using a set of synthetic and real-world benchmarks, demonstrate the feasibility and effectiveness of our approach.</dc:description>
          <dc:publisher>Schloss Dagstuhl – Leibniz-Zentrum für Informatik</dc:publisher>
          <dc:contributor>Farzad Farshchi and Prathap Kumar Valsan and Renato Mancuso and Heechul Yun</dc:contributor>
          <dc:date>2018</dc:date>
          <dc:relation>Is Part Of LIPIcs, Volume 106, 30th Euromicro Conference on Real-Time Systems (ECRTS 2018)</dc:relation>
          <dc:type>InProceedings</dc:type>
          <dc:type>Text</dc:type>
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          <dc:identifier>doi:10.4230/LIPIcs.ECRTS.2018.1</dc:identifier>
          <dc:identifier>urn:nbn:de:0030-drops-90010</dc:identifier>
          <dc:identifier>https://drops.dagstuhl.de/entities/document/10.4230/LIPIcs.ECRTS.2018.1</dc:identifier>
          <dc:language>eng</dc:language>
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