O'Donnell, John
Parallelism through Digital Circuit Design
Abstract
Two ways to exploit chips with a very large number of transistors are
multicore processors and programmable logic chips. Some data parallel
algorithms can be executed efficiently on ordinary parallel computers,
including multicores. A class of data parallel algorithms is
identified which have characteristics that make implementation on
multiprocessors inefficient, but they are well suited for direct
design as digital circuits. This leads to a programming model called
circuit parallelism. The characteristics of circuit parallel
algorithms are discussed, and a prototype system for supporting them
is described.
BibTeX - Entry
@InProceedings{odonnell:DagSemProc.07361.4,
author = {O'Donnell, John},
title = {{Parallelism through Digital Circuit Design}},
booktitle = {Programming Models for Ubiquitous Parallelism},
pages = {1--9},
series = {Dagstuhl Seminar Proceedings (DagSemProc)},
ISSN = {1862-4405},
year = {2008},
volume = {7361},
editor = {Albert Cohen and Mar{\'\i}a J. Garzar\'{a}n and Christian Lengauer and Samuel P. Midkiff},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
address = {Dagstuhl, Germany},
URL = {https://drops.dagstuhl.de/opus/volltexte/2008/1372},
URN = {urn:nbn:de:0030-drops-13724},
doi = {10.4230/DagSemProc.07361.4},
annote = {Keywords: Circuit parallelism, data parallelism, FPGA}
}
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Keywords: |
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Circuit parallelism, data parallelism, FPGA |
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Seminar: |
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07361 - Programming Models for Ubiquitous Parallelism
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Issue date: |
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2008 |
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Date of publication: |
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06.02.2008 |
06.02.2008
