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URN: urn:nbn:de:0030-drops-19235

Error Containment in the Presence of Metastability



Error containment is an important concept in fault tolerant system design, and techniques like voting are applied to mask erroneous outputs, thus preventing their propagation. In this presentation we will use the example of DARTS, a fault-tolerant distributed clock generation scheme in hardware, to demonstrate that metastability is a substantial threat to error containment. We will illustrate how metastability can originate and propagate such that a single fault may upset the system. The main conclusion is that modeling efforts on all design levels are definitely required in order to mitigate and quantify the deteriorating effect of metastability on system dependability.

BibTeX - Entry

  author =	{Andreas Steininger},
  title =	{Error Containment in the Presence of Metastability},
  booktitle =	{Fault-Tolerant Distributed Algorithms on VLSI Chips },
  year =	{2009},
  editor =	{Bernadette Charron-Bost and Shlomi Dolev and Jo Ebergen and Ulrich Schmid},
  number =	{08371},
  series =	{Dagstuhl Seminar Proceedings},
  ISSN =	{1862-4405},
  publisher =	{Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik, Germany},
  address =	{Dagstuhl, Germany},
  URL =		{},
  annote =	{Keywords: Metastability, fault tolerance, clock generation}

Keywords: Metastability, fault tolerance, clock generation
Seminar: 08371 - Fault-Tolerant Distributed Algorithms on VLSI Chips
Issue date: 2009
Date of publication: 13.03.2009

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