Violating Constant Degree Hypothesis
Requires Breaking Symmetry
Abstract
The Constant Degree Hypothesis was introduced by Barrington et. al. [5] to study some extensions of -groups by nilpotent groups and the power of these groups in a computation model called NuDFA (non-uniform DFA). In its simplest formulation, it establishes exponential lower bounds for circuits computing AND of unbounded arity (for constant integers and a prime ). While it has been proved in some special cases (including ), it remains wide open in its general form for over 30 years.
In this paper we prove that the hypothesis holds when we restrict our attention to symmetric circuits with being a prime. While we build upon techniques by Grolmusz and Tardos [23], we have to prove a new symmetric version of their Degree Decreasing Lemma and use it to simplify circuits in a symmetry-preserving way. Moreover, to establish the result, we perform a careful analysis of automorphism groups of subcircuits and study the periodic behaviour of the computed functions. Our methods also yield lower bounds when is treated as a function of .
Finally, we present a construction of symmetric circuits that almost matches our lower bound and conclude that a symmetric function can be computed by symmetric circuits of quasipolynomial size if and only if has periods of polylogarithmic length of the form .
Keywords and phrases:
Circuit lower bounds, constant degree hypothesis, permutation groups, -circuitsFunding:
Piotr Kawałek: This research was funded in whole or in part by National Science Centre, Poland #2021/41/N/ST6/03907. For the purpose of Open Access, the author has applied a CC-BY public copyright licence to any Author Accepted Manuscript (AAM) version arising from this submission. Funded by the European Union (ERC, POCOCOP, 101071674). Views and opinions expressed are however those of the author(s) only and do not necessarily reflect those of the European Union or the European Research Council Executive Agency. Neither the European Union nor the granting authority can be held responsible for them.Copyright and License:
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2012 ACM Subject Classification:
Theory of computation Circuit complexity ; Theory of computation Complexity classesEditors:
Olaf Beyersdorff, Michał Pilipczuk, Elaine Pimentel, and Nguyễn Kim ThắngSeries and Publisher:

1 Introduction
Establishing strong lower bounds for general Boolean circuits represents one of the paramount and yet unattained objectives in the field of Computational Complexity Theory. Whenever such lower bounds can be obtained, it is usually in some very restricted setting. One of the standard limitations imposed on circuits in this context is the restriction of their depth. Some strong results were obtained when the circuits have depth bounded by a constant and are built of unbounded fan-in Boolean gates and unary gates (so-called circuits). By a classical result of Furst, Saxe and Sipser [19], proved independently by Ajtai [1], polynomial-size circuits cannot compute the PARITY function (i.e., the sum of the input bits modulo 2). In fact, a followup paper by Yao [38] strengthens the lower bound for -ary PARITY to be of the form , with a final result of Håstad [26] finding a precise . Interestingly, extending the lower bounds from PARITY to (i.e. the characteristic function of addition modulo an arbitrary integer ) can be achieved by the very same proof as in [26]. For a precise formulation and even more general results in this direction, see the subsequent work by Smolensky [36].
Here, a natural dual question arises: can modulo counting gates represent the -ary Boolean function in the bounded-depth setting? To be more precise, a circuit is a circuit of depth using only (unbounded fan-in) gates. Each such gate sums the inputs modulo and outputs if the sum belongs to the set (we allow different for different gates), otherwise it outputs . Thus, the question is, after fixing and , what size does a circuit require to compute ? Is there a polynomial-size construction for , making the class collapse to (where )? The first question has a trivial answer when is a prime power, as then circuits can express only bounded-arity AND (see [5] or [29] for more details). Surprisingly, for having multiple prime divisors, only slightly super-linear lower bounds are known [12] and only for the number of wires – even more: to the best of our knowledge it is consistent with the current understanding that . At the same time, the current best construction for has size [11, 29] for some constant depending on and .
This huge gap between lower and upper bounds suggests that the problem of establishing lower bounds in this context is very difficult. Hence, one can consider simpler computational models before answering the above more general questions. Interestingly, group theory outlines in-between steps which can be considered in this context. Barrington, Straubing and Thérien [5] studied a model of non-uniform DFA () over finite groups (or, more generally, monoids), which they used to recognize Boolean languages. They discovered that, if a group is an extension of a -group by an abelian group, then its corresponding can recognize all languages (however, most of them in exponential size). Nevertheless, such s cannot compute unless they have size at least [5]. Later this result was restated in a circuit language, saying that, if is an integer and is a prime, then any -level circuit computing requires size [23, 22, 37] (here, as usual, the circuits have to be read that the gate is the output gate – other than e.g. in [29]). The equivalence of the two statements is due to the fact that these (solvable) groups have an internal structure based on modulo counting. The authors of [5] conjectured that this lower bound generalizes to s over extensions of nilpotent groups by -groups. This again can be reformulated to a lower bound for circuits computing (see [23]). This conjecture is known as Constant Degree Hypothesis (CDH for short), whose name corresponds to adding a layer of constant-arity gates on the input level to a circuit. Interestingly enough, recently in [30] it was proven that all the other groups (which do no correspond to CDH) do not admit this lower bound, i.e. one can construct of size for some using s (or corresponding circuits) over these groups. In particular, it follows from [30] as well as the related work [3, 29] that the only circuits (where are arbitrary integers) for which subexponential constructions of are not known are either the ones described by CDH (i.e., prime) or such circuits with , where are powers of different primes. However, in the latter case, replacing with just does not meaningfully change the expressive power of the related circuits (based on [29]). As a result, circuits are really the only (algebraically) natural subclass of circuits for which these strong lower bounds remain to be proven (or disproven).
Low-level circuits have many surprising connections. For instance, the techniques used in the construction of relatively small circuits for the function (equivalently, ) found in [3] are useful in constructing small explicit Ramsey-type graphs [21, 20]. These constructions are also used to produce better locally-decodable error-correcting codes [17, 15], private information retrieval schemes [16], and secret sharing schemes [33]. The lower bounds for codes considered in [17] imply lower bounds for certain circuits. On the contrary, good lower bounds for low-level circuits imply faster algorithms for solving equations in solvable groups [30], faster algorithms for certain algebraic versions of circuit satisfiability problems [28] and also faster algorithms for some variants of the Constraint Satisfaction Problem with Global Constraints [8].
These diverse interconnections encourage to put even more effort to find the correct sizes for optimal modulo-counting circuits computing . In this pursue, proving (or disproving) CDH plays a central role. The hypothesis is already proven in several special cases: in particular, the case was confirmed in the very same paper the hypothesis was defined. Moreover, if there is a bound on the number of gates that are wired to each gate, the desired lower bound is also true [23]. More precisely, the number of such connections is required to be . The technique used in this case is based on the so-called Degree Decreasing Lemma, whose name corresponds to gradually decreasing the degree , which eventually leads to the case. The Degree Decreasing Lemma can also be used when the polynomials over corresponding to the part of the circuit can be written using a sublinear number of binary multiplications [21].
In many studies of different circuit complexity classes, symmetry seems to play an important role. In this context both symmetric circuits, as well as symmetric functions were considered. Here, symmetry for a circuit/function means that permuting its inputs/variables does not change the considered circuit/function. Let us here mention the recent results on lower bounds for symmetric arithmetic circuits for the permanent and also a construction of short symmetric circuits for the determinant [13] as well as the lower bound from [27] for computing a certain entry in a product of matrices (here, symmetry means invariance under permuting rows and columns of matrices).
Symmetry seems to play also a special role for circuits. The remarkable construction of relatively small circuits for in [3] uses symmetric polynomials as an intermediate object before translating them to circuits. This translation, when done carefully, leads also to symmetric circuits. Similarly, some of the newer, more optimal constructions of two level circuits for can be performed fully symmetrically [11, 29]. Additionally, [23, 22, 37] analyze the periodic behaviour of the symmetric functions that can be represented by small (not necessarily symmetric) circuits. A value of a symmetric Boolean function is determined by the number of ones among . Hence, for an integer , we can naturally define as and say that an integer is a period of whenever for all . It follows from [23, 37] that the only symmetric functions that have representations as circuits of subexponential size must have periods of the form with . In particular, must have exponential-size circuits.
The dual question, namely the behaviour of symmetric functions computed by small circuits, has been studies quite a lot: In [14], polynomial-size symmetric circuits of arity are shown to represent only functions that are constant on the interval (for large enough ).
The same result has been obtained in [18] also showing that, if a symmetric function is constant on the interval (for some and for large enough ), then it is in . Soon after, [9] showed that the latter condition is actually an if and only if.
These results were extended to circuits of quasipolynomial size by Lu [34]: is symmetric with if and only if has period except at both ends of length . Here, for a function , we write where is the restriction of to . As usual we say that is computed by a family of circuits if for each there is a circuit computing .
For further results in this direction allowing threshold or majority gates see [4, 24, 39]. Recently, a new technique called torus polynomials were introduced [6] as a possible method to separating from and was shown that MAJORITY cannot be approximated by small-degree symmetric torus polynomials.
Contribution.
In this paper we prove that symmetric circuits computing have exponential size. A key to the proof is to analyze the periodic behaviour of the functions computed by such circuits. Our techniques work also when is unbounded and is considered as a function of . The following theorem characterizes the periodic behaviour of such functions.
Theorem 1.
Let and be primes and and let . Then any function computed by an -input symmetric circuit of size has a period given that and .
To fully understand the periodic behaviour of circuits, we would also like to construct relatively small circuits given a function with period of the form . We present such a construction below in Proposition 19. The most interesting consequence of this construction is that we get a tight characterization of the periodic behaviour of functions computed by quasipolynomial-size circuits (recall that a quasipolynomial is a function of the form for some constant ).
Corollary 2.
Let be primes and with for all . A function (with ) can be computed by symmetric circuits of quasipolynomial size if and only if, for each , has a period for some functions .
Next let us consider the case of the function more carefully. The following theorem is a careful application of Theorem 1.
Theorem 3.
Let and be primes, let be a large enough integer, and let . Then every symmetric circuit computing the function has size at least .
Note that the restriction still includes the most interesting case. Indeed, for we get an almost trivial lower bound of (see Theorem 21). Moreover, Theorem 3 suggests an interesting trade-of between the degree and the size at . Then we can reach a lower bound for the size of the form .
As a direct consequence of Theorem 3 we get the desired result for .
Corollary 4.
For constant , and primes , and every symmetric circuit for has size at least . Thus, CDH holds for symmetric circuits with being prime.
Before we go to the more technical part, let us briefly mention an opposite perspective on the results of this paper. Although current evidence seems to support CDH and lower bounds for for general circuits, it is known that circuits using random bits are able to compute in polynomial size [25]. This was even improved in [31], by showing that circuits can also be used for representing in this probabilistic model. This might be interpreted as a argument against lower bounds, because now it is enough to derandomize the construction for circuits. We already understand these -level circuits relatively well (to the point that we can prove strong lower bounds for them for the function itself). Our Corollary 4 implies that one cannot construct with polynomial-size symmetric circuits. Hence, to make short deterministic constructions one needs to either go beyond the symmetric setting or consider larger depths.
Outline.
The paper is organized as follows: in Section 2 we fix our notation on circuits as well as hypergraphs and group actions. These notions are essential in the later study of the symmetric structure of circuits. In Section 3, we describe how to rewrite a circuit into a nicer form that we use throughout the paper. Then in Section 4 we present our key lemmas including proofs or short proof sketches and show how to derive our main results. The missing proofs can be found in the full version on arXiv [32]. In Section 5 we add some discussion of our results.
2 Preliminaries
Hypergraphs.
For we write for the set of integers . For a set we denote its power set by . A hypergraph on a set of vertices is a pair with . A -labeled hypergraph is a pair where . We obtain an (unlabeled) hypergraph by setting and call each with an edge of . Thus, an -labeled hypergraph is indeed a hypergraph where we assign to each edge a number from . Moreover, is called an -labeled -hypergraph if for all with we have . We write for the set of -labeled -hypergraphs on . For we write for the complement of .
If and are -labeled hypergraphs on the same set of vertices , we define (resp. ) as (resp. ) where denotes the point-wise addition. We interpret any subset as a hypergraph by setting if and otherwise (be aware of the slight ambiguity as is not uniquely defined by – but it always will be clear from the context). Thus, we have defined the addition (resp. ). We extend this to .
Permutation groups.
For any set we denote the group of permutations on by (i.e., the symmetric group). For an integer we write or for the abstract symmetric group acting on any -element set. Any subgroup acts faithfully on and is called a permutation group. A subset is called an orbit of the action of on if for some . If there is only one orbit, the action of on is called transitive. Clearly, the orbits form a partition of ; moreover, if are the orbits of the action of on , then where denotes the direct product of groups.
Finally, let be a subgroup. A left-transversal (in the following simply transversal) of in is a subset such that is a system of representatives of – in other words, if and for with . For further details on permutation groups, we refer to [10].
Actions on hypergraphs.
Given an action of on , it induces an action on . Moreover, this extends to an action on where a permutation maps to for defined by . Be aware that the -1 is not by accident but rather guarantees that if some has label , then has label . Note that two labeled hypergraphs with vertices are isomorphic if and only if they are in the same orbit under . A permutation is called an automorphism of if – with other words, if for all . For a labeled hypergraph , we denote its group of automorphisms by .
Circuits.
A circuit is usually defined as a directed acyclic graph with labels on its vertices that inform what kind of operation (like for instance , ) a given vertex (gate) computes. We allow multiple edges between any pair of gates. A depth- circuit of arity is a circuit that consists of inputs gates and layers (or levels) of inner gates (we do not count the input gate as a level). Between neighbour layers and there is a layer of wires which contains directed edges between and (where ). We allow for multiple (directed) edges between the same pair of gates. Moreover, gates are labeled with necessary information which allows to compute a function they represent. In our case we use gates where is a prime and . A with inputs outputs if and only if the sum of its inputs modulo is contained in . A circuit is called an expression if it is a tree when removing the input layer. A subexpression of an expression is a subgraph containing for every gate also all its predecessors (towards the input gates). For circuits with inputs we write if for all inputs they evaluate to the same value. We define the size of a circuit as its number of non-input gates.
In this article we consider circuits: such a circuit consist of -levels. On level there are gates each of which receives inputs from at most input gates. The second level consists of gates – each of them is labeled with an accepting set . The output layer contains only one gate, which sums all the wires from modulo .
We say that a circuit is symmetric if no permutation of the input wires changes the circuit. Note that here the word symmetric refers to a syntactic structure of a circuit, rather than a semantic property of the function computed by it. More formally, a circuit on inputs is called symmetric if for any there is a permutation on the set of gates extending (meaning that for all ) such that there are wires connecting gate to gate if and only if there are wires connecting gates to gate .
3 Preparation: Circuits, Expressions and Hypergraphs
For a simpler notation of expressions, let us denote with inputs instead by for , where computes the function
Be aware that we use for different domains, i.e. as a function and . The domain will be clear from the context.
From circuits to expressions.
Any 2-level circuit corresponds to polynomial over the field . Indeed, the gates act like a multiplications on the two element domain and the gate sums the results and checks whether the sum belong to the accepting set . Because our circuits are of constant-depth, we can unfold the circuits to obtain expressions. This means, if a gate has an outgoing wire to several other gates, we create multiple copies of , so that each gate has only a single output wire. Note that this might lead to a polynomial blow-up in size (more precisely, a circuit with size and depth bounded by is converted to an expression of size at most – thus, in our case ). Moreover, note that unfolding the circuit does not destroy the property of being symmetric. Hence, every symmetric circuit yields also a symmetric expression
(1) |
for suitable , and polynomials of degree bounded by for and which computes the same function. Here, is the number of gates used in the circuit, while tells us how many times a given gate is wired to the gate. Let us take a closer look at what being symmetric means for an expression of the form (1): for each there exist such that for all we have , , and (here = refers to equality in the polynomial ring ).
Next, observe that if we omit the outer of the expression (1), the function computed by the resulting expression certainly does not have any new (smaller) periods than the one of the complete expression. Therefore, as we are aiming for an upper bound on the periods of the considered symmetric circuits, we will now concentrate on the symmetric expressions of the form
(2) |
with , and polynomials of degree bounded by . Indeed, every period of is a period of , so for proving lower bounds, it is enough to consider the periods of . An expression of the form (2) is called a expression and each is an elementary subexpression of .
In the following, let us write for . Using this notation we have Moreover, we always assume that for we have as otherwise we can replace by where . Thus, using to denote the set of multilinear polynomials in with degree bounded by , we rewrite in (2) as
(3) |
Note that to compute the size of we only need to count the non-zero (plus the number of AND gates computing the polynomials ).
Polynomials and hypergraphs.
Let us take a closer look at the part of a circuit or expression. As any such expression is represented by a polynomial of degree , we will need to deal with these polynomials and their symmetries. Notice that without loss of generality, we can assume that the polynomial corresponding to a circuit is multi-linear since, because the values of variables are restricted to each occurrence of a higher power of a variable can be simply replaced by .
In order to deal better with the combinatorics and symmetries of polynomials, we think of polynomials as hypergraphs. A multilinear polynomial with the degree bounded by can be naturally identified with an -labeled -hypergraph as follows:
-
1.
Treat each variable in as a vertex in the graph . Thus, , which we also identify with the set .
-
2.
Each monomial is represented by a hyperedge with a label , i.e., we have .
Thus, we get a one-to-one correspondence between multilinear polynomials over of degree at most and -labeled -hypergraphs. This means that we can also do the reverse – for each labeled graph we can create its corresponding polynomial . Moreover, note that also the arithmetic operations we defined on hypergraphs as well as the group actions agree with those on polynomials. Therefore, in the following, we use polynomials and hypergraphs interchangeably.
Now, we can use our graph notation for polynomials in a more general setting and denote each expression by or simply (when we start with a hypergraph representing a given polynomial). Thus, we can reformulate any expression of the form (3) as
Symmetric expressions induced by hypergraphs.
Now we define several notions, useful in analysing symmetric expressions. For and , let us write for . The action of on now extends naturally to an action on expressions of the form by setting
Now, being symmetric can be simply expressed as the fact that for each we have
Definition 5.
Let be a labeled -hypergraph. Let be its group of automorphisms and let be a transversal of . For a given , define to be the following expression
(4) |
One needs to check that the above definition does not depend on the choice of the transversal, as there is a choice in picking the specific traversal which we use to create . However, as is invariant under its automorphisms, no matter how we choose the specific , we get the same expression in the end. In fact, every symmetric expression containing as subexpression, must also contain as subexpression. So is a symmetric closure of the basic expression . Let us summarize this as follows:
Remark 6.
For every labeled -hypergraph and every , the expression is symmetric. Moreover, it is the smallest symmetric expression that contains as an elementary subexpression.
Fact 7.
Every symmetric expression can be written as a sum
for (recall that denotes the set of labeled -hypergraphs on ).
Proof.
If a symmetric has some as an elementary subexpression, it must also have as a subexpression (see Remark 6). But now is a symmetric expression which is shorter than , and hence we can use induction to prove the desired decomposition for , by adding to the decomposition of .
4 Description of the Proof
We now start with an expression as in 7 and prove our main theorems. For this, we need several definitions and intermediate results. For some of these intermediate results, the full proofs are deferred to the full version [32]; instead, we present short proof sketches, give some high-level ideas how the respective results are used, and then, in Section 4.4, show how our main results follow from the intermediate results. As every symmetric expression is decomposed into an appropriate sum of elements of the form , we need a deeper understanding of each . We investigate these expressions in three main steps:
-
1.
we analyze the symmetries of to find a large so-called fully symmetric set (see Lemma 10),
-
2.
we process the hypergraph further to make it symmetry purified (see Definition 13 and Lemma 14) applying two versions of the Degree Decreasing Lemma (Lemma 11 and Lemma 12),
-
3.
we analyze the periods of the resulting expressions (see Theorem 16).
4.1 Symmetries of Hypergraphs
Recall that one of our goals is to prove exponential lower bounds on the size of symmetric circuits/expressions computing . In Lemma 10 we are going to show that, if in an expression we find a very asymmetric graph , we know that the size of must be relatively large. This is because the automorphism group of is small and, hence, the length of the expression of the form (4) induced by , i.e. , must be large (more precisely, as defined above is large). On the other hand, for highly symmetric graphs , we can find a big, very regular substructure of , which we will call a pseudo-clique.
Definition 8.
Let be an -labeled hypergraph (i.e. ). We say that a subset is fully symmetric, if for each pair of subsets with and we have .
Moreover, an -labeled hypergraph is called a pseudo-clique if – or, equivalently, if for each there is some such that all with .
Note that an induced subgraph on a fully symmetric subset of vertices is a pseudo-clique. We obtain the following easy observations.
Fact 9.
Let be an -labeled hypergraph .
-
A subset is fully symmetric if and only if .
-
If are fully symmetric sets with , then so is .
-
If is a maximal fully symmetric set with , then for some .
Now, we are ready to present a key lemma, which allows us to restrict our attention only to very symmetric hypergraphs.
Lemma 10.
Let . Every -labeled hypergraph with has either
-
a fully symmetric subset on at least vertices, or
-
its automorphism group satisfies .
Proof.
Let us write . We say that is small if . Let us first show that either is small or contains a pseudo-clique on at least vertices (in a second step, we will show that this pseudo-clique, indeed, is fully symmetric).
We start by observing that is a subgroup of , where are the sizes of the orbits of the action on . If for all , then and is small because of
So from now on there is one orbit consisting of at least vertices. Then we have and we denote by the projection to the first coordinate.
Suppose does not act primitively on meaning that there is an -invariant partition of with classes each of which consists of vertices (as acts transitively on , it must acts transitively on the classes; hence, they all have the same size). Thus, is isomorphic to a subgroup of the wreath product with (see [10, Theorem 1.8]). Hence,
Here the last inequality is because (in particular , the second last inequality is due to the assumption and and . The third last inequality is because as . Since the index of in is at least the index of in , again is small.
Hence, it remains to consider the case that acts primitively on . Thus, writing according to [7, 35] (see also [2]), there are three possibilities: is either (the alternating group on elements) or or . First, let us consider the last case. As , we have . Therefore, we conclude that we have (which holds for all ) and, as above, the index of in is at least , meaning that is small.
In the former two cases (i.e., that is or ), acts set-transitively on (meaning that for each pair of subsets with there is a permutation mapping to ); hence, is a pseudo-clique.
To see that is, indeed, fully symmetric if is not small, we proceed as follows: Now, let denote the kernel of the projection to the second component (i.e. the pointwise stabilizer of ). Then we have (when identifying with the corresponding subgroup of ). As is simple and the index of is at most in (which is either or ), we have or (as is also normal in ). In both cases acts set-transitively on and; hence, is fully symmetric (which, by 9, also excludes the case ).
4.2 Reduction Based on the Degree Decreasing Lemma
One of the few examples of lower bounds for circuits using modulo counting are due to Grolmusz and Tardos [23, 22]. The authors prove lower bounds for circuits with restrictions put on connections between layer and gates. More precisely, [22] shows that if the number of multiplications needed to compute the polynomial corresponding to each subcircuit is bounded by for small enough , then a circuit requires exponential size to compute . One of their key tools is the so-called Degree Decreasing Lemma:
Lemma 11 (Degree Decreasing Lemma).
Let be prime numbers. Then every function represented by a -ary expression can be also represented by an expression of the form
where are some coefficients from (also depending on and ).
The Lemma is a consequence of the result by Grolmusz [22, Lemma 6] (note that the statement there does not include the factor , so formally, to obtain Lemma 11, one needs to apply [22, Lemma 6] several times). One can also see it as a consequence of [29, Fact 3.3]. This very simple lemma allows us to navigate through the space of different representations for a given function by allowing a local change of its corresponding expression. The power of the lemma comes from the fact that we can substitute arbitrary polynomials for and obtain many different equivalences.
We will need a more regular version of the Degree Decrasing Lemma when the multiplication inside has bigger arity. The price we pay for a nicer form is that the represented function has a smaller (partially Boolean) domain, which slightly reduces the scope of applicability of the lemma (as we cannot substitute any polynomial for the variables); however, it still suffices for our purposes.
Lemma 12 (Symmetric Degree Decreasing Lemma).
Let be prime. Let . Then every function represented by a -ary expression
can be also represented by an expression
for and some coefficients .
The key property of the formula is that it is invariant under permutations of the variables , which is not the case for original Degree Decreasing Lemma of [22]. The next step in the proof is to apply the Symmetric Degree Decreasing Lemma (Lemma 12) to expressions generated by highly-symmetric hypergraphs in order to obtain an even nicer representation defined as follows:
Definition 13.
We call an -labeled -hypergraph symmetry-purified with respect to if
-
1.
is fully symmetric in ,
-
2.
if , then is completely contained either in or in (i.e., every edge is fully contained either in or in ,
-
3.
if and , then (i.e., every edge with satisfies ).
Moreover, if the graph satisfies only conditions 1 and 2, we will call it partially symmetry purified. We write for the set of all symmetry-purified -hypergraphs with respect to and for the set of partially symmetry-purified -hypergraphs with respect to (note that and are implicitly defined from the context for and ).
The next crucial lemma allows us to restrict our attention only to expressions over symmetry-purified graphs, which have a very regular and much easier to analyze structure. This enables a later combinatorial analysis of the periodic behaviour of such . The proof of the lemma relies on carefully applying both Lemma 11 and Lemma 12 to alter the graphs while preserving the symmetry of the corresponding expression.
Lemma 14.
Let be prime numbers, let , and let be an -labeled -hypergraph. Moreover, let be a maximal fully symmetric subset with . Then there are constants such that
Proof sketch.
We will first represent a function computed by by a sum of expressions for being partially symmetry purified. Let be an edge in , such that and . We would like to remove the edge from . To do so, we apply Lemma 11 to replace by a linear combination of and . However, if we do this only for we may destroy the symmetry of the resulting expression. For this reason, we pick not only but its entire orbit and apply Lemma 11 simultaneously to it. Indeed, setting and , since is fully symmetric, we have
Since all the must have the same label , we have
where , and . Thus, after applying Lemma 11 to each summand of (as in the formula (4)), we get a symmetric expression which is a linear combination of subexpressions of the form . Hence, we have replaced with a sum , where each graph does not contain the edge anymore and has no new edges intersecting both and non-trivially. We apply this reasoning recursively for as long as there is any edge in any graph in the sum that intersects non-trivially with and . At the very end there are no such edges left, so we managed to represent as a sum of expressions over partially symmetry purified graphs .
Next, assume that is already partially symmetry purified with respect to but not yet symmetry purified. Pick an edge of size at least and denote its orbit as . We have
Now by applying Lemma 12 subsequently to the edges , we can replace all these edges with linear combinations of its vertices. Because the formula in Lemma 12 is symmetric, we end up with a symmetric expression at the end. So we have replaced by a sum of , but now each has less bad edges. We apply this reasoning recursively to write as a sum of where each is symmetry purified.
4.3 Period of Symmetry-Purified Expressions
For a fixed input and an -ary symmetric expression , we can compute the value only knowing the Hamming weight of the input, i.e. the number of s in . This means that represents not only a function , but we can also view it as a function . It turns out that a relatively small circuit can compute only functions with a relatively small period. Here, by a period of we mean an integer that satisfies for all in the range . Note that all functions have periods , so we are mainly interested in finding periods in the range . Note that the function, which is of our particular interest, does not have any period (less than ). Thus, proving an upper bound for a period of a function computed by a relatively short expression will give us a lower bound for the length of representation of . This is in line with some of the previous research [3, 22, 37]. As any can be transformed into a symmetric expression over symmetry-purified graphs, we only need to concentrate on these special graphs. Indeed, any common period among all the elements of the sum, transfers to the sum itself.
For the following theorem, we need a careful analysis how an expression for some symmetry purified graph is computed. We rely on the fact that, for fixed , the function is periodic with period for each such that (see for instance [29, Proof of Fact 3.4]). Recall that a multinomial coefficient counts the number of ordered partition of elements set into sequences of disjoint subsets of sizes . More formally, for we have
(5) |
Lemma 15.
Let be a prime. Let be a sequence of integers. Let be such that . Then the function
is periodic with period where .
Proof.
We use the formula (5) for computing multinomial coefficient. Note that the first factors of the above product are constants, while the last one satisfies
So, periodicity of multinomial coefficient comes from periodicity of the binomial coefficients.
Theorem 16.
Let be prime numbers, and let be an -labeled -hypergraph on vertices that is symmetry purified with respect to a maximal fully symmetric subset of vertices of size . Then is a period of where is the smallest integer satisfying and is the smallest integer satisfying .
Note that, if , Theorem 16 establishes no non-trivial periods.
Proof.
Note that the induced subgraph on the set is a pseudo-clique. Moreover, as , we can reconstruct the graph up to isomorphism having the following information
-
1.
the size of the largest pseudo-clique in ,
-
2.
the type of the pseudo-clique, where is the label of every -ary edge in the pseudo-clique
-
3.
sizes , where is the number of vertices that are not in the pseudo-clique and have a unary edge with label . Vertices corresponding to label in will be denoted (thus, ).
Using this characterization of a symmetry purified hypergraph , we obtain
Fact 17.
In particular, we have at most orbits under the automorphism groups (note that we have less than orbits if some of the are )
Now we evaluate on some integer (and denote this by ). In order to do it, pick which has ones on the first coordinates, i.e . Hence,
where, as before, is a transversal of . Each summand evaluates to 1 or 0, depending on the mapping . Being more precise, if maps elements of to , …, and elements of to , then evaluates to
(6) |
where denotes the number of elements of mapped to , which is computed according to formula . Recall that if and only if .
Let denote the set of that make the sum (6) evaluate to . Observe that we have natural inequalities for all and . Hence, the feasible can be described by
(7) |
Moreover, let denote the number of permutations in that map elements of to and elements of to (for ). Hence, we have
Next, let us determine . Note that each permutation in
maps each of the sets to some subsets with , and .
Now, if two mappings output the same image , then and hence and must belong to the same coset of in . Since were chosen to be a transversal of , this is only possible when . So, the mapping is injective.
In fact, the mapping is also surjective as for any particular with we can find some which maps and . Indeed, just pick any satisfying for all and and take its representative in the equivalence class modulo as . So we have a bijective mapping between permutations and ordered partitions of satisfying , and .
Thus, if we want to count , we need to count the number of proper partitions satisfying , and . In other words, we partition an -element set into disjoint subsets of sizes and an -element set into disjoint subsets of sizes ; this leads to the following formula
(8) |
Now, when fixing , we will use Lemma 15 to show that the function is periodic with period in the interval where is the smallest integer such that . The periodicity is immediate for the first element of the product by Lemma 15. Let . One can see that the values of the second element of the product produce, in the interval , a reversed sequence compared to the one produced by
Indeed, and plays the role of in the reversed sequence. As periodicity of any given sequence on the interval is preserved under reversing, and as , we get the desired periodicity of (as the period transfers to the product).
Now, one could argue that then the sum
must be periodic, as it is just a sum of elements that are periodic. Unfortunately, selects elements of the sum depending on (i.e. the depend on ). We need to address this issue.
Note that in (7) we can drop the condition because whenever or the formula (8) returns value anyway (as multinomial coefficient takes value whenever or ). So we can effectively get rid of in to get an updated definition
(9) |
and maintain the value of the sum, i.e.
Let be the smallest integer satisfying . We further modify the definition of to create in the following way
(10) |
We claim that for all
There are cases we need to consider.
-
1.
When some fixed belongs to both and , then cancels out from both sides of the equation. Similarly if does not belong to either of the sets, we do not have on either of sides of the equation.
-
2.
If and or and , there must be some such that . This can only be the case if is negative: otherwise, because , from the periodicity of function (for natural numbers ), we would get that and, hence, the conditions for and would be identical from the perspective of . But when , then is zero due to definition of multinomial coefficient, so it does not contribute to any of the sides anyway.
So we obtain that
But now the formula (10) gives ranges for ; thus, we conclude that is always positive (since ). So is periodic with period where is the smallest integer with . Looking at the definition of we conclude:
Fact 18.
Let . For we have
Hence, the condition depends not really on , but on the remainder of modulo . So now, for all integers we define as in order to obtain that for . Now we can see that is periodic with period :
The first and the third equality comes from periodicity of the condition and the fact that and give the same rest modulo and the second one comes from the equality of rests modulo and periodicity of .
4.4 Main Theorems
Now we have all the necessary components to prove our main theorems.
Proof of Theorem 1.
As discussed in Section 3, any circuit has a corresponding symmetric expression with no periods smaller than the circuit we started with (note that there can happen some blow-up in size, but this does not matter as we argue below). By 7, can be written as a sum of expressions of the form . Hence, from now on let us consider one of these expressions .
We choose such that (meaning that and ). If does not contain a fully symmetric set of size at least , by Lemma 10, it satisfies . Thus, writing as in Equation 4, it follows that . As all the different terms in this sum get their inputs from different graphs , also for each term in the sum there must have been a different gate in the original circuit we started with. This is a contradiction as .
Hence, all the subexpressions contain a fully symmetric set of size at least . Now, Lemma 14 tells us that we can write as a sum of expressions of the form where is symmetry-purified with respect to . Then, Theorem 16 implies that each such has a period , where is the smallest integer such that and is the smallest integer such that . As is a sum of different , which all share the period , it itself has period .
The following result shows that the estimate of size which can be derived from Theorem 1 is asymptotically (almost) precise.
Proposition 19.
Let be primes. Let be natural numbers. For every symmetric function with a period there is a symmetric circuit of size which computes , where and and .
The proof, which is a rather straightforward application of known facts, can be found in the full version on arXiv.
Corollary 20.
Let be primes and with for all . A function (with ) can be computed by a family of symmetric circuits of quasipolynomial size if and only if, for each , has a period for some functions .
Moreover, if is a constant, then can be computed by symmetric circuits of quasipolynomial size if and only if, for each , has a period for some function .
Proof.
If has period , by Proposition 19, is computed by a circuit of size where . As , it follows that can be computed by a family of quasipolynomial-size circuits. In the case that is a constant, Proposition 19 still can be applied with the same outcome.
On the other hand, if is computed by a family of quasipolynomial-size circuits, we first observe that without loss of generality . Indeed, if for some the circuits use an gate for some , then the size of the circuit, because of the symmetry property, is at least . If this holds for every and infinitely many , then the circuit family is not of quasipolynomially bounded size.
Now, it remains to apply Theorem 1, which tells us that has period where is the smallest integer with and is the smallest integer with where is the size of the -input circuit. As , both parts of the corollary follow (for the second part, observe that is the smallest -power greater than ).
Instead of directly proving Theorem 3, let us derive the following slightly more explicit and general variant of the theorem:
Theorem 21.
Let be primes and let and . Then every symmetric circuit computing the function has size at least .
Proof.
Let us write . First consider the case that and there is actually an gate with inputs. Since for any also must be a gate in the circuit, we obtain different gates for each -element subset of . As there are many such subsets, the theorem holds in this case (almost trivially).
Therefore, in the following, we assume and consider an arbitrary -input circuit of size . By Theorem 1, the function computed by has period where is the smallest integer with and is the smallest integer with . Notice that and and, hence, we have
Thus, does not compute the function as does not have any non-trivial period.
5 Further Perspectives
Arguably one of the strongest applications of the Degree Decreasing Lemma is Theorem 4 in [22]. It implies that, if all the polynomials over that compose the top levels of a -circuit can be written with a sublinear number of (binary) multiplications, then the circuit can be replaced with a circuit with only a subexponential blow-up in size. We argue that this kind of theorem cannot be applied in the context of our proof.
Note that a large pseudo-clique in the symmetry-purified expressions are (arbitrary) symmetric polynomials. Most of symmetric polynomials over require at least a linear number of multiplications in any formula (circuit) defining them. To see it, consider the example as a polynomial over . One can easily check that it represents a function with smallest period . But now, if it could be written with a sub-linear number of multiplications, by Theorem 4 in [22], it could be represented by a sub-exponential size circuit. However, this contradicts [23, Theorem 2.4] as subexponential size circuits can only represent periodic functions with period of the form . This shows that that the Degree Decreasing Lemma cannot be used in this context, as it puts the limitations on its own applicability, by providing arithmetic circuit lower bounds. Such lower bounds can be proved for all non-trivial symmetric polynomials over with using a similar period analysis. Thus, our symmetry purification technique as well as combinatorial analysis contained in the proof of Theorem 16 constitute a substantial improvement over the Degree Decreasing Lemma and its accompanying techniques.
The results of the present paper indicate what type of symmetric functions might be computable by small, but not necessarily symmetric, circuits. It is natural to believe that the optimal (or nearly optimal) representation of the symmetric function should also be symmetric. Thus, we state the following
Conjecture 22.
For fixed , the only symmetric functions that can be represented by circuits of subexponential size have to be periodic with some period of the form , for being the smallest integer with and be such that .
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