Abstract 1 Introduction 2 Preliminaries 3 A Fixed-Parameter Algorithm Parameterized by Vertex Integrity 4 An XP-Algorithm For Bounded-Width Linear Layouts 5 Single-Exponential Algorithm for 1-Page Queue Layouts 6 Concluding Remarks References

Linear Layouts Revisited:
Stacks, Queues, and Exact Algorithms

Thomas Depian ORCID Algorithms and Complexity Group, TU Wien, Austria Simon D. Fink ORCID Algorithms and Complexity Group, TU Wien, Austria Robert Ganian ORCID Algorithms and Complexity Group, TU Wien, Austria Vaishali Surianarayanan ORCID University of California at Santa Barbara, CA, USA
Abstract

In spite of the extensive study of stack and queue layouts, many fundamental questions remain open concerning the complexity-theoretic frontiers for computing stack and queue layouts. A stack (resp. queue) layout places vertices along a line and assigns edges to pages so that no two edges on the same page are crossing (resp. nested). We provide three new algorithms which together substantially expand our understanding of these problems:

  1. 1.

    A fixed-parameter algorithm for computing minimum-page stack and queue layouts w.r.t. the vertex integrity of an n-vertex graph G. This result is motivated by an open question in the literature and generalizes the previous algorithms parameterizing by the vertex cover number of G. The proof relies on a newly developed Ramsey pruning technique. Vertex integrity intuitively measures the vertex deletion distance to a subgraph with only small connected components.

  2. 2.

    An n𝒪(q) algorithm for computing -page stack and queue layouts of page width at most q. This is the first algorithm avoiding a double-exponential dependency on the parameters. The page width of a layout measures the maximum number of edges one needs to cross on any page to reach the outer face.

  3. 3.

    A 2𝒪(n) algorithm for computing 1-page queue layouts. This improves upon the previously fastest n𝒪(n) algorithm and can be seen as a counterpart to the recent subexponential algorithm for computing 2-page stack layouts [ICALP’24], but relies on an entirely different technique.

Keywords and phrases:
stack layouts, queue layouts, parameterized algorithms, vertex integrity, Ramsey theory
Funding:
Thomas Depian: Project No. 10.47379/ICT22029 of the Vienna Science Foundation (WWTF).
Simon D. Fink: Project No. 10.47379/ICT22029 of the Vienna Science Foundation (WWTF) and Project No. 10.55776/Y1329 of the Austrian Science Fund (FWF).
Robert Ganian: Project No. 10.47379/ICT22029 of the Vienna Science Foundation (WWTF) and Projects No. 10.55776/Y1329, 10.55776/COE12 of the Austrian Science Fund (FWF).
Copyright and License:
[Uncaptioned image] © Thomas Depian, Simon D. Fink, Robert Ganian, and Vaishali Surianarayanan; licensed under Creative Commons License CC-BY 4.0
2012 ACM Subject Classification:
Theory of computation Parameterized complexity and exact algorithms
Related Version:
Full Version: https://arxiv.org/abs/2508.16319 [14]
Editors:
Anne Benoit, Haim Kaplan, Sebastian Wild, and Grzegorz Herman

1 Introduction

A linear layout ,σ of a graph G is a total ordering of its vertices and a partitioning σ of its edges into k pages such that each page satisfies certain conditions. The two by far most commonly studied types of linear layouts are stack layouts and queue layouts; in the former, we require that no four vertices abcd have the edges ac and bd placed on the same page, while for the latter we forbid any page from containing the edges ad and bc. Intuitively, this corresponds to forbidding edges crossing and edges nesting (in a rainbow pattern), respectively – see Figure 1. Due to space constraints, we defer full proofs of statements marked with ★ to the full version [14].

Figure 1: A graph G (a) together with a 2-page stack layout (b) and 2-page queue layout (c). The two pages are colored blue and lilac, respectively.

Originally motivated from applications in VLSI [10, 41] and bioinformatics [31], stack and queue layouts have become the focus of extensive research. While there are many classical works studying the structural properties of the two notions [32, 46, 34, 19, 18, 20, 21, 17], several more recent studies have targeted exact and parameterized algorithms for computing stack and queue layouts that minimize the number of used pages. These results are inherently aimed at circumventing the long-known intractability of these problems: the 𝖭𝖯-hardness of determining whether an input graph admits a 2-page stack layout or a 1-page queue layout has been established over thirty years ago [46, 34].

To that end, recent works have pursued the use of structural graph parameters to establish tractability on graphs which are “well-structured”. Computing -page stack layouts is now known to be fixed-parameter tractable w.r.t. the vertex cover number [7] or, alternatively, the feedback edge number of the input graph G [26]. Computing -page queue layouts is likewise known to admit a fixed-parameter algorithm w.r.t. the vertex cover number of G [8]. One drawback of these results is that they only yield tractability under highly restrictive graph parameters, in the sense of achieving low values only on very “simple” graphs. While computing 1-page queue layouts is also known to be fixed-parameter tractable when parameterized by the treedepth of G [8], for general it was repeatedly posed as an open question whether the aforementioned vertex-cover based algorithms can be lifted to less restrictive structural graph parameters [21, 7, 25, 8, 26]. Another recent direction is the establishment of tighter algorithmic upper bounds for special cases: while -page stack and queue layouts can both be computed in time n𝒪(n) via trivial brute-force algorithms, 2-page stack layouts are now known to admit a subexponential algorithm [26].

Contributions.

As our first contribution, we lift the aforementioned fixed-parameter tractability of computing linear layouts to a less restrictive structural graph parameter:

Theorem 1.

Computing a minimum-page stack layout and minimum-page queue layout is fixed-parameter tractable w.r.t. the vertex integrity of the input graph.

The vertex integrity vi(G) of a graph G measures, roughly speaking, how many vertex deletions are required to decompose G into small connected components, and has been used in the design of parameterized algorithms for a variety of challenging problems [22, 9, 24, 27, 23, 29, 39, 30].111Some prior works use the fracture number, which is parametrically equivalent to vertex integrity. More precisely, vi(G) is the minimum integer k satisfying the following: there exists a vertex set XV(G) such that for each connected component C of GX, |V(C)X|k. As vertex integrity is upper-bounded by the vertex cover number plus one, Theorem 1 generalizes the fixed-parameter tractable algorithms for computing stack and queue layouts w.r.t. the vertex cover number by Bhore, Ganian, Montecchiani, and Nöllenburg [7, 8]. Moreover, since the vertex integrity is sandwiched between the vertex cover number and treedepth, our result can be seen as a stepping stone towards solving the problem on more general parameterizations.

To establish Theorem 1, we introduce a novel proof technique we call Ramsey pruning. On a high level, the algorithm underlying the computation is very simple: assuming |G| is larger than some pre-designated function k, it recursively identifies a connected component C of GX such that GX contains sufficiently many copies of C, and deletes C from the instance. The difficulty lies in proving that this operation is safe, i.e., that GC does not admit a layout with fewer pages than G. The “usual” approach for such a proof would be to show that C can be reinserted into any hypothetical linear layout ,σ of GC without increasing the number of pages; however, this not only seems excruciatingly difficult to prove, but we also believe it to be false for certain choices for ,σ. Ramsey pruning avoids this issue by using Ramsey-type arguments to argue that ,σ must contain a guiding sub-layout ,σ – a linear layout of some carefully selected subgraph of GC – with certain well-defined properties. We then use the well-formedness of ,σ to build a brand new linear layout ,σ of G, thus establishing that G and GC indeed require the same number of pages. We believe this new technique to be generic and applicable to other problems under the same parameterization, as suggested by the fact that unlike the previous vertex-cover based algorithms our approach works for both stack and queue layouts with almost no problem-specific changes required.

While Theorem 1 pushes the frontiers of tractability for our two problems of interest in a complexity-theoretic sense, our use of Ramsey-type arguments means that the obtained running time bound has an entirely impractical dependency on the parameter (see Lemma 5). In fact, up to now none of the known parameterized algorithms for computing -page stack or queue layouts have a runtime parameter dependency that would be better than double-exponential – the parameterized algorithms w.r.t. the vertex cover [7, 8] and feedback edge numbers [26] all preprocess the graph to obtain an equivalent instance (a kernel) whose size is exponential in the parameter, and then solve that equivalent bounded-size instance via brute force. As our second contribution, we provide the first single-exponential algorithms (in the parameters) capable of solving these problems for arbitrary fixed choices of :

Theorem 2 (★).

Given integers and q along with an n-vertex graph G, we can compute an -page stack or queue layout with page width at most q of G (if one exists) in time n𝒪(q).

Here, the page width measures the maximum number of edges one needs to cross to reach any vertex from the outer face (see also Section 2). The page width of linear layouts222The term cutwidth has been used interchangeably with page width in the past [10]; here, we use the latter in order to disambiguate from the related graph parameter cutwidth. has been studied in several early works [10, 32, 43, 44] and it is generally desirable to obtain layouts not only using few pages, but also with low page width – in fact, the original papers introducing stack layouts explicitly targeted algorithms optimizing both measures. However, the algorithmic applications of page width as a parameter have only been investigated in a recent paper on extending incomplete linear layouts [12]. We remark that while Theorem 2 merely provides a so-called 𝖷𝖯 algorithm in a complexity-theoretic sense, it may still be more efficient in practice than known fixed-parameter algorithms for the problem – especially if the aim is to compute layouts with low pagewidth.

A natural approach towards establishing Theorem 2 would be to use dynamic programming in order to construct the sought-after linear layout in a “left-to-right” fashion; however, the issue is that doing this directly would require us to store roughly 2n possible subsets of previously processed vertices. To circumvent this, we obtain new insights into the decomposability of layouts with bounded page width, allowing us to construct an n𝒪(q)-size auxiliary state graph H, where we show that the dynamic computation of a sought-after layout can be represented as an easily computable path in H.

As our final third contribution, we take a step back from the multivariate analysis of these problems and recall that the trivial n𝒪(n) barrier was only recently overcome for computing 2-page stack layouts [26], i.e., the lowest-page stack layouts giving rise to an 𝖭𝖯-complete problem. Here, we show that the trivial n𝒪(n) barrier can also be overcome when aiming for the lowest-page queue layouts which still give rise to 𝖭𝖯-completeness:

Theorem 3 (★).

Given an n-vertex graph G, we can compute a 1-page queue layout of G (if one exists) in time 2𝒪(n).

We remark that the running time bound provided by Theorem 3 is worse than the 2𝒪(n) bound previously obtained for 2-page stack layouts [26]. The reason for this is that the latter result relied on the equivalence of 2-page stack layouts with the existence of subhamiltonian paths; the authors of that previous work then essentially obtained a single-exponential fixed-parameter algorithm for finding such paths w.r.t. the graph parameter treewidth, improving on the previously established fixed-parameter tractability of the problem [4].

However, emulating the same approach seems difficult in the queue layout setting: 1-page queue layouts also have an equivalent formulation in terms of so-called arched-level planar drawings [34], but it is not at all clear whether computing such drawings is fixed-parameter tractable w.r.t. treewidth (not to mention the fact that one would need a single-exponential algorithm). Instead, our proof of Theorem 3 relies on a Turing reduction from computing arched-level planar drawings to 2𝒪(n) many instances of a well-studied problem called Level Planarity, which is known to be solvable in polynomial time [33, 37].

Related Work.

We refer to the dedicated survey for an overview of many earlier structural results concerning linear layouts [19]. Key structural results in the area include the existence of 4-page stack layouts [46] and 42-page queue layouts [17, 5] for all planar graphs. Researchers have also studied the notion of mixed layouts, which are linear layouts with some pages behaving like stack and some like queue layouts [3, 38]. We note that due to the techniques used in their proofs, it seems very likely that Theorems 1 and 2 could be adapted to the mixed layout setting with minimum changes required. Finally, we remark that parameterized algorithms for stack and/or queue layouts have additionally been considered in the extension setting (where the task is to complete a provided partial layout) [12, 13], in the upward-planarity setting (where the graph is directed and edges must be oriented in a left-to-right fashion along the layout) [6] and when the vertex ordering in the layout is fixed [40, 1].

2 Preliminaries

For an integer 1 we let [] denote the set {1,2,,}. We assume the reader to be familiar with standard graph terminology [15]. Without loss of generality, we assume all input graphs to be connected, have n vertices and m edges. For a set of vertices VV(G), we let G[V] denote the graph induced on V. Furthermore, for a set of edges EE(G), we let V(E) denote the set of its endpoints and G[E]=(V(E),E). A cut (A,B) of G is a partition of the vertices in AV(G) and B=V(G)A. We call F={uvE(G)uA,vB} a cut-set of size |F| that induces the cut (A,B). Throughout the paper, we omit an explicit reference to G if it is clear from the context, e.g., we write V and E instead of V(G) and E(G).

Given a linear order of a graph G and two vertices u,vV, we say that u is left of v if uv and right of v if vu. The vertices u and v are consecutive on the spine if they occur consecutively in , i.e., there is no vertex wV such that uwv or vwu holds. We address with Leftv{uVuv} all vertices uV left of v with respect to and define RightvV(Leftv{v}). Finally, we let Xv{uwEuLeftv{v},wRightv} denote the set of edges that span the spine between v and its right neighbor, i.e., all edges with one endpoint left of (or at) v and one right of v.

We assume familiarity with the basic foundations of parameterized complexity theory [11]. All algorithms obtained in this work are exact, deterministic, constructive and rely exclusively on computable functions. To express some of our bounds, we will occasionally use the Knuth notation where for an integer z, 2z represents an exponential tower of 2’s of height z.

Linear Layouts.

Let u1v1 and u2v2 be two edges of G. We say that they cross under a linear order if u1u2v1v2 holds, and they nest if u1u2v2v1 holds. For an integer 1, let σG:E(G)[] be a function that assigns each edge to a page p[]. The linear layout G,σG is a stack (queue) layout if no two edges e1,e2E with σG(e1)=σG(e2) cross (nest). We call G the spine order and σG the page assignment. For the remainder of the paper, we write and σ if the graph G is clear from context.

The page width ω(,σ) of an -page linear layout ,σ corresponds to the maximum number of edges on a single page that span the spine between a vertex and its right neighbor, i.e., ω(,σ)maxp[]maxvV(G)|Xvσ1(p)|. We call an -page linear layout with page width q an -page q-width linear layout, or simply a solution when the and q are clear from context. In line with the literature, we assume no explicit bound on the page width when q is not specified.

Vertex Integrity.

A graph G has vertex integrity vi(G)=p if p is the smallest integer with the following property: G contains a vertex set S such that for each connected component H of GS, |V(H)S|p. One may observe that the vertex integrity is upper-bounded by the size of a minimum vertex cover in the graph (i.e., the vertex cover number) plus one. The vertex integrity of an n-vertex graph along with a corresponding partition into S and 𝒞=GS can be computed in time 𝒪(pp+1n) [16].

3 A Fixed-Parameter Algorithm Parameterized by Vertex Integrity

In this section, we obtain a fixed-parameter algorithm that takes as input a positive integer and a graph G, is parameterized by +vi(G) and computes an -page stack and/or queue layout of G (or both), if such layouts exist. We begin by noting that using well-known relationships between vertex integrity, minimum-page stack and queue layouts and the graph parameter treewidth (tw), we can assume to be upper-bounded by a function of vi(G) thanks to the well-known relation tw(G)vi(G):

Proposition 4 ([20, 45]).

The number of pages in a minimum stack and queue layout of a graph G is upper-bounded by tw(G)+1vi(G)+1 and 2tw(G)+12vi(G)+1, respectively.

The algorithm operates by obtaining a problem kernel, as formalized below; recall p=vi(G).

Lemma 5.

There is an 𝒪(pp+1n) time algorithm that takes a graph G with an integer and outputs a subgraph G of G (a kernel) of size at most (2(p22p2)2+6)p with the following property: G admits an -page stack (or queue) layout G,σG if and only if so does G. Moreover, such a layout for G can be computed from G,σG in polynomial time.

Lemma 5 directly implies Theorem 1, and the rest of this section is dedicated to proving this lemma. For the following, let us fix a graph G, positive integers and p, and a choice of SV(G) witnessing vi(G)=p as in Section 2. Further let 𝒞 be the set of connected components of GS. First, we define a notion of “component-types” which groups components in 𝒞 that exhibit the same outside connections and internal structure.

Definition 6.

We say two graphs H0,H1𝒞 are twins, denoted H0H1, if there exists a canonical isomorphism α from H0 to H1 such that for each vertex uV(H0) and each vS, uvE(G) if and only if α(u)vE(G).

Lemma 7 (★).

Each graph H𝒞 has at most p vertices, is an equivalence relation and the number of equivalence classes in [] is upper-bounded by p22p2. Moreover, a partition of connected components into [] can be computed in time at most 𝒪(p22p2n).

We now introduce the notion of large equivalence classes based on their size. We then use this to define what we call a large group of vertices – one that contains exactly one representative from each large equivalence class. Our kernel will keep a bounded number of these large groups.

Definition 8.

Let k be a positive integer, an equivalence class [H] of is said to be k-large if |[H]|k. Further a vertex set LV(G) is called a k-large group if the induced subgraph G[L] is a disjoint union of exactly one graph from each k-large equivalence class of .

Next we define a special induced subgraph that will serve as our kernel. The definition is based on carefully choosing a k that is bounded by a computable function of p and so that keeping only k many k-large groups along with the small parts of the graph suffices to capture the necessary structure. Towards this, let us first fix f(,p,x):=22x2212p2 to be a computable function that is large enough to apply our Ramsey-type arguments later on; here, x will be an integer that represents the size of a deletion set (initially S, but this will be updated iteratively in the proof of Lemma 11). Moreover, let g(,p) be a computable function of and p that will upper-bound our nested application of the function f in that same proof; to provide a concrete bound, we set g(,p):=(2(p22p2)2+4)p.

Definition 9.

An induced subgraph G of G is said to be a reduced graph of G if there exists a positive integer xg(,p) and a partition of V(G)=SSY satisfying:

  1. 1.

    |SS|=x and S is the set of all vertices in graphs in 𝒞 that do not belong to an f(,p,x)-large equivalence class of .

  2. 2.

    If there are no f(,p,x)-large equivalence classes of , Y= and V(G)=SS=V(G). Otherwise, it holds that Y=L1Lf(,p,x) where Li is an f(,p,x)-large group for each i{1,,f(,p,x)}, and each pair of Li and Lj, ij, is vertex-disjoint.

Intuitively, the reduced graphs we will be dealing with will consist of S, a set S of all equivalence classes of which are too small to fully saturate our large groups (these will later be treated essentially in the same way as S), and a sufficient number of large groups; equivalence classes of size larger than f(,p,x) are “pruned” to have size exactly f(,p,x). A schematic overview of this intuition can be found in Figures 2b and c later on.

The core of our result is the following lemma, which we prove separately in Section 3.1.

Lemma 10.

If G is a reduced graph of G then G has an -page stack (queue) layout if and only if G has an -page stack (queue) layout.

Before proceeding to that proof, we show how to construct a reduced graph having size bounded by a computable function of p and in polynomial time.

Lemma 11 (★).

There exists a reduced graph G of G, and given S and such a graph can be computed in polynomial time. Further, the number of vertices in G is upper-bounded by (2(p22p2)2+6)p.

Lemma 11 combined with Lemma 10 establishes Lemma 5 by constructing a reduced graph which is a kernel of the desired size. Thus, what remains is to establish Lemma 10; this is where the core ideas of Ramsey pruning will come into play.

3.1 Proof of Lemma 10

For this proof, we fix G to be a reduced graph of G. Since G is an induced subgraph of G, it is clear that if G has an -page stack (queue) layout then G also has an -page stack (queue) layout. To complete the proof we show that the reverse is true: If G has an -page stack (queue) layout, then G also has an -page stack (queue) layout.

Recall that f(,p,x):=22x2212p2. Let ,σ be a fixed (but hypothetical) -page stack (queue) layout of G; throughout this section, for HG we will use H,σH to refer to the sublayout of ,σ induced on the subgraph H of G. If V(G)=V(G) we are done. So let V(G)=SSL1Lf(,p,|SS|) be a partition witnessing that G is a reduced graph. Here each Li is a f(,p,|SS|)-large group and S is the set of all vertices in graphs that do not belong to an f(,p,|SS|)-large equivalence class in . For brevity, we will hereinafter use large as shorthand for f(,p,|SS|)-large.

Let ={L1,,Lf(,p,|SS|)}. Our key idea is to identify three large groups X,Y,Z with a special structure (a “guiding sublayout”) in the solution ,σ using Ramsey theory. We will then use this pattern to insert the remaining parts of the graph. Before proceeding, we define some notations to be able to identify these groups, starting with a “template” R.

Definition 12.

Let k be the number of large equivalence classes in and let Ri𝒞 be a canonical representative of the ith large equivalence class [Ri]. Let R:=V(R1)V(Rk).

Recall that by Definition 8, if X is a large group then G[X] is a disjoint union of exactly one graph from each large equivalence class of . We now define a natural isomorphism from G[X] to G[R]. This will allow us to map consistently between different large groups via R.

Definition 13.

For a large group X with G[X]=H1Hk, Hi[Ri] for each i[k], let αX be an isomorphism from G[X] to G[R]=R1Rk such that for each i[k] and vertex uHi, αX(u)V(Ri), and for each vS, uvE(G) if and only if αX(u)vE(G).

For any large group A and for each uR we will sometimes use uA as shorthand for αA1(u). From now we fix two distinct large groups L and L in . Further, for distinct large groups X,Y, we say XY if in , the first vertex in XY is from X.

Definition 14.

For XY{L,L}, we define ϕX,Y:SSXYSSLL

  • ϕX,Y(s)=s for each sSS

  • ϕX,Y(x)=αL1(αX(x)) for each xX

  • ϕX,Y(y)=αL1(αY(y)) for each yY

Note that ϕX,Y is an isomorphism from G[SSXY] to G[SSLL].

Definition 15.

For XY{L,L}, info,σ(X,Y) is the stack (queue) layout of G[SSLL] obtained from G[SSXY],σG[SSXY] using the isomorphism ϕX,Y.

We are now ready to show the existence of three distinct large groups X,Y,Z with a useful consistent pattern between them and SS based on info. Essentially, these three groups will form the aforementioned guiding sublayout used to argue the correctness of the pruning step, i.e., establish Lemma 10 by showing that we can reinsert all the removed vertices by building on G[SSXYZ],σG[SSXYZ]. Note that – perhaps counterintuitively – we will do so by discarding all other information about ,σ. We refer to Figure 2 for an overview of the entire approach and to Figure 4 for a visualization of info.

Figure 2: A schematized overview of (a) the used notation and (b)(f) proof of Theorem 1. In the latter, G is the original input graph, G the reduced graph obtained after applying Lemma 11, and SSXYZ form the guiding sublayout that is used to construct an -page layout for a graph G+ which is a supergraph of G – hence establishing that G admits an -page stack (or queue) layout if and only if so does G.
Lemma 16.

There exists distinct large groups X,Y,Z{L,L} with XYZ such that info,σ(X,Y)=info,σ(Y,Z)=info,σ(X,Z).

Proof.

Construct a complete edge colored auxiliary graph with V()={L,L}. For X,Y{L,L} with XY, we set color((X,Y))=𝗂𝗇𝖿𝗈,σ(X,Y). Let x:=|SS|.

Claim 17 (★).

The number of possible distinct edge colors of is at most 2x229p2.

We now use a well-known fact (from Ramsey theory [2]) that any edge-colored clique on n vertices colored with t colors has a monochromatic clique of size at least logt(n)/t.

We have |V()|=||2=f(,p,x)222x2211p2. Thus n22x2211p2 and t2x229p2 and therefore there is a monochromatic clique of size at least logt(n)/t2223. A monochromatic clique of size 3 in corresponds to distinct large groups X,Y,Z{L,L} with XYZ such that info,σ(X,Y)=info,σ(Y,Z)=info,σ(X,Z). Let X,Y,Z be three large groups witnessing the previous lemma. We now show that we can partition the vertices of X, Y, and Z in a nice way that will guide us on how to insert the remaining parts of the graph. Towards this, we first note that the info,σ forces (1) edges incident to X, Y and Z to have the same page assignment, and moreover (2) forces the individual vertex orderings of XSS, YSS, ZSS to be exactly the same as some ordering of RSS; see also the full version [14, Observations 18 and 19]. However, this does not yet fix how the vertices of X, Y and Z are ordered with respect to each other.

For the following, let us set Υ=SSXYZ. Let a block be a consecutive subsequence of vertices from R w.r.t. , and a solution-block of G[Υ],σG[Υ] be a consecutive subsequence of vertices from Υ; see also Figure 3.

Figure 3: An ordering of RSS and a partition of R into the blocks B1 to B6, indicated in gray. Note that vertices of SS, colored green and red, respectively, always separate two blocks. However, not every pair of blocks is separated by such a vertex, see, for example, blocks B3 and B4.

We are now ready to prove the structural result which provides strong guardrails on G[Υ],σG[Υ]; in particular, it guarantees that all vertices from X, Y and Z must occur in consecutive solution-blocks and following a strict “ascending” or “descending” order. We remark that this structural result is only made possible by the extraction of three copies of large groups via Lemma 16; see also Figure 4 for an illustration.

Lemma 18 (★).

There exists a pair (P,ζ), where P is a partitioning of R into blocks and ζ:P{,} satisfying the following. For every block BP with ζ(B)=, the sequence αX1(B)αY1(B)αZ1(B) is a solution-block of G[Υ],σG[Υ]. Moreover, for every block BP with ζ(B)=, the sequence αZ1(B)αY1(B)αX1(B) is a solution-block of G[Υ],σG[Υ].

Crucially, we can now use Lemma 18 to safely insert an arbitrary number of large groups into G[Υ] without increasing the number of required pages.

Figure 4: (a) The three large groups XYZ{L,L} form a monochromatic clique in the auxiliary graph , i.e., we have info(X,Y)=info(Y,Z)=info(X,Z). The tuple (P,ζ), where P partitions R into two blocks B1={r1,r2,r3} and B2={r4,r5} with ζ(B1)= and ζ(B2)= fulfills the properties from Lemma 18. As X,Y,Z form a monochromatic clique, the solution blocks from (b) must occur in G[Υ],σG[Υ].
Lemma 19 (★).

Let G+ be the supergraph of G with each large equivalence class having equal size, then G+ has an -page stack (queue) layout.

Proof sketch..

Let t3 be the maximum size of a large equivalence class of . Note that G+ can be expressed as G+=G+[SSX1Xt] where each Xi,i[t] is a large group. We construct a stack (or queue, as desired) layout +,σ+ of G+ as follows.

Construction of 𝝈+.

For each edge (u,v)G+,

  • If u,vSS, we set σ+(u,v):=σ(u,v).

  • If uXi for some i[t] and vS, we set σ+(u,v):=σ(rY,v) where r=αXi(u).

  • If u,vXi for some i[t], we set σ+(u,v):=σ(rY,rY) where r=αXi(u), r=αXi(v).

Construction of +.

In , replace each block BP with αX11(B)αX21(B)αXt1(B) if ζ(B)= and with αXt1(B)αXt11(B)αX11(B) if ζ(B)=.

To show that +,σ+ is indeed an -page stack (queue) layout of G+, we show that any conflict in +,σ+ would also imply a conflict in G[Υ],σG[Υ] in the full proof [14].

4 An XP-Algorithm For Bounded-Width Linear Layouts

In this section, we present an algorithm to decide if a given graph G has a stack (or queue) layout on pages and with page width q, i.e., an -page q-width linear layout, in n𝒪(q) time. In the affirmative case, it can also output such a layout. Since only little adaption is required between stack and queue layouts, we only discuss problem specific changes where necessary. We will first give an intuitive overview over our approach and the core ideas to showing its correctness, details can be found in Sections 4.2 and 4.1 and the full version.

Bounded-size Interfaces.

Observe that, for each vertex vV in a stack (or queue) layout ,σ of G, the edges Xv that span the spine right next to v, induce the cut (Leftv{v},Rightv) in G; see Figure 5a. The size of the cut-set F=Xv only depends on the number of the pages and their width. Our algorithm is centered around the insight that, through limiting these parameters and thus the size of any such cut, we limit the size of the “interface” (a notion we will define more precisely in a second) between a drawing on its left side and a drawing on its right side (Lemma 22). We note that this insight parallels to the approach used by Saxe [42] to test if a graph has bandwidth at most k. In our setting, replacing the left side of such cut in any solution drawing with one that provides the same interface will yield another solution. This is because having the same interface will imply inducing the same decompositions into left and right vertices (Lemma 24), the statement then follows by simply gluing the two drawings together along the cut.

Our bounded-size interface consists of the set of edges F that intersect the cut right next to v, their vertical order along the cut, and the information which edge endpoint lies on which side of the cut, together with a page assignment for the edges in F. We will encapsulate this information in what we call a (nicely) oriented cut-set; see Definition 21.

Figure 5: The two-page width-five stack layout in (a) induces the cut-set F=Xv indicated with the red edges. (b) The three connected components in GF are indicated with color. Observe that (F,cdeghj) is nicely oriented. The source e and sink g cannot be in the same connected component, as every path between them contains at least one edge of F; e.g., the edge fg cannot exist.

Our Dynamic Programming Solution.

Given only an arbitrary oriented cut-set F for an instance G, we are able to infer which connected components and thus which vertices of the graph lie on the left (or also right) side of the cut (Lemma 23; see also Figure 5b). This now allows us to solve this problem via dynamic programming. We build a directed acyclic state graph where each state corresponds to one configuration of our interface, i.e. one (nicely) oriented cut-set together with a page assignment for its edges (formalized as 𝒩C 1 and 2 in the full version [14]). We add an arc between two states if we can move from one oriented cut-set to the other by moving exactly one vertex (which we inferred to be on the right side via Lemma 23) to the (end of a linear order used on the) left without directly violating a necessary stack or queue layout property (i.e., no crossing or nesting of edges) with regard to only the edges in the current cut-set; the exact conditions are again formalized as 𝒜C 1–4 in the full version [14]. In Lemma 25, we will show that this means that we can extend any partial solution represented by the current state with the further vertex when moving along such an arc to obtain a solution for the new state. Then, we have a yes-instance if and only if there exists a directed path between the (artificially-distinguished) empty beginning and end states. As finding such path takes linear time, Theorem 2 then follows from the insight that the state graph has a size bounded by n𝒪(q) and can be computed in this time.

4.1 Decomposing Linear Layouts Using Oriented Cut-Sets

As already hinted above, our algorithm uses at its core cut-sets of G to compute the desired stack (or queue) layout G,σG. Before we discuss their usage in detail, let us first take a closer look at them and define their desired properties.

Observation 20.

Given a connected graph G and a cut-set FE that separates the graph into k2 connected components C1,,Ck. For all i[k], component Ci contains at least one vertex that is an endpoint of an edge in F.

We consider in addition to a cut-set F a total order F on the endpoints of its edges and call this the oriented cut-set, denoted as (F,F). While a single cut-set F has 𝒪((2|F|)!) different oriented cut-sets, we are only interested in “nicely oriented” cut-sets. Let F be a cut-set and F a linear order on the endpoints of edges in F. A vertex vV(F) is a source (or sink) in (F,F) if for every edge uvF we have vFu (uFv, respectively).

Definition 21.

For a cut-set F, (F,F) is nicely oriented if and only if each vertex vV(F) is either a source or sink, each connected component of GF contains either only sources or only sinks, and all sources are left of every sink in F.

To ease presentation, we use a slight abuse of notation and allow the linear order F of an oriented cut-set (F,F) to be a total order of a super-set of V(F). We consider (F,) and (F,) identical if and agree on V(F). We now establish a crucial connection between linear layouts and nicely oriented cut-sets of G; see also Figure 5.

Lemma 22 (★).

Let G be a graph and ,σ be an -page q-width linear layout of G. For every vertex vV that is not the rightmost in , the edges Xv form a cut-set of size at most q that induces the cut (Leftv{v},Rightv) in G. Furthermore, (Xv,) is nicely oriented.

A liner order induces an oriented cut-set (F,) if there exists a vertex v that witnesses (Xv,)=(F,). Note that the same oriented cut-set can be induced by different linear orders. From Lemma 22, we can deduce that all cuts (A,B) of an -page q-width stack (and queue) layout of G can be constructed using at most (mω)=𝒪(mω) different cut-sets. We aim to use their oriented counterparts to obtain the spine order of the desired stack (or queue) layout. We next show that we can efficiently compute for a given oriented cut-set (F,F) a witnessing linear order that induces (F,F).

Lemma 23 (★).

Given a graph G and a nicely oriented cut-set (F,F) of G, we can compute a linear order of V that induces (F,F) in 𝒪(n+m) time.

Lemma 23 only shows that we can compute some linear order of V that induces (F,F). However, to efficiently use oriented cut-sets in our state graph, we must be able to precisely determine which vertices have already been placed on the spine without storing them explicitly. The following lemma lays the foundation for this, as it shows that no matter which linear order we choose to induce an oriented cut-set (F,F), we obtain the same partition into left and right vertices.

Lemma 24 (★).

Let (F,F) be a nicely oriented cut-set. Furthermore, let and be two linear orders such that (Xv,)=(Xu,)=(F,F) for some u,vV, i.e., they induce (F,F). Then we have Leftv{v}=Leftu{u}.

4.2 Using Nicely Oriented Cut-Sets to Show Theorem 2

The state graph H contains a node for each possible nicely-oriented cut-set of G, together with the corresponding page assignment. The arcs in H represent possible transitions from one nicely oriented cut-set to another that can occur when traversing a hypothetical solution from left to right (see Figure 6), i.e., that are obtained by moving exactly one vertex from the right to the left. A state S=(F,FX,σFX) is feasible if and only if there exists an -page q-width stack layout S,σS of G[L(S)V(F)] such that for all u,vV(F) we have uFvuSv and σF=σS|F. For queue layouts, the definition is analogous. In the full version, we show that, essentially, having arcs only between state pairs where both induce valid stack (or queue) layouts on their respective cut-sets is enough to preserve feasibilty along arcs.

Figure 6: (a) Parts of a stack layout of G with the two cut-sets Xu and Xv. (b) The corresponding nodes in the state graph. The arc in (b) corresponds to the transition from Xu to Xv in (a). Edges appearing in at least one cut-set are colored.
Lemma 25 (★).

Let H=(N,A) be a state graph and SXSYA one of its arcs. If SX is feasible for stack (queue) layouts then so is SY.

We now have all tools at hand to present our algorithm. Since the arcs of H preserve existence of a (partial) -page q-width stack (or queue) layout of G, we have reduced the problem of finding such a layout to the problem of finding a path in H between the two special nodes S and SV. In the full version, we show that H can be computed in polynomial time and use this to summarize the main result of this section in the following theorem.

Theorem 2 (★). [Restated, see original statement.]

Given integers and q along with an n-vertex graph G, we can compute an -page stack or queue layout with page width at most q of G (if one exists) in time n𝒪(q).

The algorithm from Theorem 2 runs in polynomial time for constant and q. Furthermore, recall that deciding if a graph has a 2-page stack layout or 1-page queue layout is 𝖭𝖯-complete [46, 34]. An -page 1-width stack or queue layout witnesses that G has cutwidth at most , which is in general 𝖭𝖯-complete to decide [28]. This means that under well-established complexity assumptions, it is not possible to preserve 𝖷𝖯-tractability if either of the two parameters is dropped.

5 Single-Exponential Algorithm for 1-Page Queue Layouts

In this section, we show that we can find a one-page queue layout, if it exists, in 2𝒪(n) time, which improves on the trivial algorithm that exhaustively considers all n! possible spine orders. Our algorithm exploits the equivalence between one-page queue layouts and arched leveled planar embeddings established by Heath and Rosenberg [34]. We first show that we can reduce the problem of deciding whether a graph admits a one-page queue layout to deciding whether at least one of 2𝒪(n) labeled instances of Arched Leveled Planarity admits a solution. While Arched Leveled Planarity is 𝖭𝖯-complete [34], our labeled instances can be solved in linear time thanks to a reduction to the well-studied problem Level Planarity [35, 36]. We will assume that G is connected (as each component can be treated separated) and, as G must be planar [34], we assume |E|=𝒪(n).

We translate the definition of Heath and Rosenberg [34] into moderns terms as follows. Graph G has a leveled planar embedding if there exists a level assignment function γ:V[h] that maps each vV to one of h1 levels, and a straight-line planar drawing Γ of G such that each vertex v has y-coordinate γ(v) and all edges are proper, i.e., for all uvE we have |γ(u)γ(v)|=1. The latter property allows us to express the drawing as a collection of total orders i, one for each level i[h], that specifies the left-to-right order of the vertices on level i [36]. For each level i, let si be the rightmost vertex on level i in Γ such that we have siwE for some wV with γ(w)=i+1, or if there is no such vertex, let si be the leftmost vertex on level i. Arched leveled planar embeddings extend leveled planar embeddings by also allowing non-monotone arching edges tiw between the leftmost vertex ti on level i and vertices wV with γ(w)=i and siiw [34]. These edges can be drawn crossing-free below the lowest level; see Figure 7b. The problem Arched Leveled Planarity asks whether G has a level assignment that admits an arched leveled planar embedding. Heath and Rosenberg [34] showed that the spine order of a one-page queue layout of a graph G induces a level assignment together with a vertex order on each level that together yield an arched leveled planar embedding of G and vice versa; see Figure 7.

Figure 7: (a) A one-page queue layout of G and (b) the corresponding arched leveled planar embedding obtained by the equivalence established by Heath and Rosenberg [34]. (c) The labeling induced by the embedding from (b): Arcs labeled and are colored lilac and blue, respectively.

We show that, when seeking a one-page queue layout of G, one can branch over the information needed to infer the level assignment for a corresponding arched leveled planar embedding. Consider an arbitrary orientation of the edge set E as an oriented arc set A and let δ:A{,} be a function that determines if an arc uvA should be ordinary () or arching ( ). The tuple =(A,δ) is called a labeling of G; see also Figure 7c. A level assignment γ is said to be consistent with if and only if, for every uvA, it holds γ(u)=γ(v)1 if δ(uv)= and γ(u)=γ(v) if δ(uv)=. Similarly, an embedding Γ is consistent with if its level assignment is consistent and we have uγ(u)v for every uvδ1(). Clearly, every arched leveled planar embedding Γ of G induces a labeling (AΓ,δΓ) that is consistent with Γ. Conversely, we can reobtain Γ from this (AΓ,δΓ) by fixing an arbitrary vertex to level 0, performing a BFS from v using the direction information in AΓ to determine levels for all other vertices above and below, and potentially shifting all assigned levels such that their numbers span the same range as those in Γ. This is formalized by the following lemma.

Lemma 26 (★).

Let =(A,δ) be a labeling of G. In linear time we can compute a level assignment γ:V[h] that is consistent with the labeling or report that no such assignment exists. If there exists an arched leveled planar embedding Γ that induces , then there also exists one that induces and uses the level assignment γ.

To now decide if a given graph G has an arched leveled planar embedding Γ, we can branch over all 𝒪(4n)=2𝒪(n) different labelings =(A,δ) of G. In each branch, we use Lemma 26 to compute a level assignment γ or immediately reject the branch. Thus, it remains to check in each branch, i.e., for each level assignment, if G admits a corresponding arched leveled planar embedding. We do so using a linear-time reduction to the problem Level Planarity, which requires a level assignment as part of its input but does not allow arching edges. We emulate arching edges in Level Planarity as follows (see also Figure 8). First, we enclose the whole graph in a frame, which is a cycle spanning from below its lowest level to above its highest that will have a unique embedding (up to reflection) and for which we ensure that the remaining graph is drawn inside of it. Between each pair of levels i,i+1, we add a level i+0.5 and subdivide all edges to ensure properness. We use li and ri to refer to the two vertices of the frame cycle that are on level i+0.5. Replace each arching arc uvA with δ(uv)= on level i with the edges uli1, uli, and vri to G; see Figure 8. Observe that this forces u to become the leftmost vertex on level i and v to be right of any vertex adjacent to one on level i+1. We provide a formal construction and show equivalence in the full version [14]. Using the known algorithm for testing Level Planarity in linear time [35, 36], we finally obtain our third contribution.

Figure 8: (a) An instance of Labeled Arched Level Planarity and (b) the obtained instance of Level Planarity. We also visualize a drawing and color the frame and edges that simulate the arching edges from (a) in green and blue, respectively. Only relevant subdivision vertices are shown.
Theorem 3 (★). [Restated, see original statement.]

Given an n-vertex graph G, we can compute a 1-page queue layout of G (if one exists) in time 2𝒪(n).

6 Concluding Remarks

While our results improve the state of the art on computing linear layouts in several directions, they also highlight the prominent open questions in this area. In particular, Theorem 1 moves us closer to settling the long-standing open questions of whether treewidth or treedepth can be used to facilitate the computation of linear layouts [21, 7, 25, 8, 26]. At the same time, Theorems 2 and 3 yield the question of whether these classical problems can be solved in single-exponential time.

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