Lower Bounds Beyond DNF of Parities
Abstract
We consider a subclass of circuits that simultaneously captures and depth- circuits. For this class we show a technique for proving lower bounds inspired by the top-down approach. We give lower bounds for the middle slice function, inner product function, and affine dispersers.
Keywords and phrases:
boolean circuits, top-down, unpredictabilityCopyright and License:
2012 ACM Subject Classification:
Theory of computation Circuit complexityAcknowledgements:
We thank Mika Göös for fruitful discussions. We also thank Pengxiang Wang and anonymous reviewers for useful comments on the text. In particular, we thank a CCC 2025 reviewer who pointed out an issue with the proof of Theorem 16 in the earlier version of the paper.Funding:
Authors are supported by the Swiss State Secretariat for Education, Research and Innovation (SERI) under contract number MB22.00026.Editor:
Shubhangi SarafSeries and Publisher:
Leibniz International Proceedings in Informatics, Schloss Dagstuhl – Leibniz-Zentrum für Informatik
1 Introduction
Constant-depth (or ) de Morgan circuits is one of the circuit classes that is reasonably well-studied, even though strong exponential lower bounds of the form are still out of reach. This model can use unbounded , and gates, and the underlying graph of a computation is a constant-depth tree; intuitively, these circuits represent computations that can be efficiently parallelized. There are known hard examples of functions that cannot be computed with small-size circuits. The most notable ones include Xor and Maj:
These functions require size depth- circuits, and the lower bounds for them are achieved mainly with two techniques: random restrictions, or switching lemma, [13, 1, 42, 18, 19] and polynomial approximation [33, 38]. In particular, for circuits of depth , there is a lower bound of for both of these functions (for Xor it is known to be tight), and breaking through the barrier in the exponent for any explicit function is a major open question. Proving strong exponential lower bounds for depth- circuits would essentially give a superpolynomial lower bound for general circuits [40, 14] which is a major open problem in complexity theory. Both switching lemma and polynomial approximation seem unable to give us such strong lower bounds.
Circuits with MOD Gates
The situation becomes more challenging in terms of lower bounds, when we plug-in hard functions for into our computational model. One of the most natural generalisations of circuits that follow this concept is circuits, that can also utilise gates computing defined as
On the one hand, a lower bound for this model is necessary to show lower bounds for general circuits. On the other hand, showing such lower bounds is a challenging problem. For example, techniques based on random restrictions, such as switching lemma application, do not work quite as they do in , since gates are not simplified after restriction. However, when is a prime power, polynomial approximation achieves lower bounds of the form for Maj [33, 38], as well as for computing for a prime power that is relatively prime with .
When is not a prime power, very little is known. In fact, utilising non-prime with many divisors, it is possible to compute any symmetric function in subexponential size even in depth [8]. The “minimal example” of the non-prime regime is . It is still an open question to prove lower bounds for , and the known techniques fail at resolving that. The reason for that is that polynomial approximation only works over fields, and there is no field with elements.
Even for the simplest example of gates: , or Xor, we are very far from understanding the exact power of circuits. Allowing the use of the Xor function in the gates of a circuit increases its computational power; for example, depth- circuits can compute Maj in size [29], whereas it requires -size circuits.
The drawbacks of Razborov–Smolensky polynomial approximation method translate to the gaps in our understanding of the class . In particular, we do not have strong correlation bounds against these circuits even for one of the simplest subclasses of these circuits: (depth- unbounded fan-in circuits of -type) [22]. Here, denotes the composition, and this means that Xor gates are only allowed in the bottom layer of the circuit. Moreover, the polynomial approximation method only applies to functions that require a large degree over . Thus, it is unknown whether the inner product requires large circuits with an additional layer of parity gates in the bottom (). It is known that IP requires exponentially large circuits [24, 10], but even for -circuits the best known lower bound is [9].
1.1 Top-down Approach
Overall, there is a clear shortage of new techniques in circuit complexity and, by extension, in adjacent areas, while the well-known ones also have the well-known drawbacks. In this work, we focus on studying another circuit lower bound technique, which falls under the umbrella of top-down methods.
Top-down lower bounds start from the output gate of a candidate circuit and move down the circuit in search of a mistake. While such an approach has been known for a long time, and there is a long line of work on top-down lower bounds for depth- circuits [4, 36, 27, 20, 35, 31, 32, 23, 30, 41, 6, 28, 14, 12, 15], it still remains largely underdeveloped. So far top-down lower bounds against are known only for circuits up to depth- [17], while bottom-up methods yield lower bounds for arbitrary constant depth (or even in some cases). The motivation for studying top-down comes from the fact that this method is complete for circuits (see discussion in [21, 15, 17]). In other words, there are no formal barriers that would prevent such an approach from being able to prove lower bounds in the regimes where other known methods cannot.
The main model to which top-down techniques are applicable is circuits, and the main example of a hard function is Xor. In this work, we attempt to adapt such techniques to be able to prove lower bounds for circuits with parity gates. We consider a subclass of which is strictly stronger than and prove lower bounds for it in a top-down fashion. In particular, we prove a lower bound for an affine disperser, which does not follow from Razborov–Smolensky method.
1.2 The Model and Results
In a recent paper Huang, Ivanov, and Viola [22] give an explanation of why the class resists known lower bound techniques. They show that there is a circuit of this type that computes a very strong affine extractor: a function that is almost balanced on all large enough affine subspaces. On the other hand, it is known that affine extractors are hard for (by definition we know upper bounds on Fourier coefficients, which contradicts with spectrum concentration of small circuits obtained from switching lemma or polynomial approximation, see, for example [39]) and [10]. Moreover, [22] show that can compute a one-sided affine extractor: a balanced function that is never too biased towards zero on large enough affine subspaces. They then use the latter result to separate from that has at most distinct Xor gates (here is the number of variables). In other words, such a circuit is a composition of an -circuit and a non-singular affine transformation over , or an circuit, where denotes the set of such affine transformations.
That circuit class can already compute arbitrary linear forms, but we consider a stronger model. Our model is essentially a union of and within .
Definition 1.
Let be some constant depth de Morgan circuits and be non-singular affine transformations. We then say that -circuit is , i.e. the disjunction of compositions of a constant-depth circuit and an affine map. The depth of a -circuit is the depth of . The size of a circuit is the total number of gates in . If we denote the corresponding circuit type as . We denote a depth- -circuit class by , this class is our main focus.
We remark that the choice of as the top gate is arbitrary, all the arguments could be handled with on top (with hard functions changing appropriately).
Our primary motivation for studying this class is to develop a line of attack on subclasses of circuits. Along the way, we establish lower bounds for the class, making concrete progress in this direction. As a subclass of , also has a natural interpretation in a top-down framework, as it corresponds to specific assumptions allowed in the proof strategy. We discuss this in Section 2. It is worth noting that as is a subclass of , is a subclass of . So, strong average-case lower bounds against would also imply lower bounds. In Section 4, we propose a roadmap of intermediate open questions which aims to extend this approach to eventually achieve lower bounds for stronger subclasses of and even .
As a main result we present a general approach for proving lower bound for this model of computation. We give the highlights of the technique in Section 2. We now show the comparison of this model with classical models and state the lower bounds that we get.
The Comparison of the Models
Let us first observe that is properly larger than depth- . Observe that is a special case of . The strict inclusion is then implied by the following.
Theorem 2 ([22]).
A function that admits a polynomial circuit may require an exponential circuit.
Proof sketch.
Implied by the combination of Corollary 5 and Claim 21 in [22], the former shows that can compute functions for which there is a correlation bound for -depth parity decision trees (PDT), while the latter observes that the switching lemma applied to a -circuit yields a -depth PDT approximating the function.
On the other hand, is properly larger than . Since contains CNF this statement is implied by the following Theorem.
Theorem 3.
Let defined as where the sum is over . Then any circuit computing has size .
To the best of our knowledge, this is the simplest existing lower bound for . We include the proof in Section 3.4.
Affine Dispersers
is a -affine extractor if for every affine subspace (where we equate and ) of dimension at least we have . We say that is a -affine disperser if it is a affine extractor, i.e. for every -dimensional affine subspace .
In our first result, we confirm that is smaller than . Theorem 3 in [22] shows that polynomial-size circuit computes affine extractors with polylogarithmic dimension (i.e. the function is close to being balanced in every affine subspace of at least polylogarithmic dimension). On the other hand, we prove the following theorem in Section 3.2.
Theorem 4 (informal).
If a function is not constant on any -dimension affine subspace (i.e. it is an -affine disperser) then it requires circuits of exponential size.
Inner Product
The inner product function defined as follows . It is a big open problem to get a lower bound for the inner product in . In Section 3.3 we show that the inner product function requires exponentially large circuits. The technique there is a combination of random restrictions with a top-down step.
Middle Slice
The middle slice function is defined as , i.e. it equals iff the input contains exactly ones. In Section 3.1 we prove via a top-down argument that this function requires -size circuits.
2 Technique
2.1 Top-down Lower Bounds
The general sketch of an top-down proof looks as follows.
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Consider a circuit (the case of is treated analogously). Suppose we want to prove that cannot distinguish certain sets of inputs and . Assume that, on the contrary, and .
-
Note that and also for every it holds that . We pick some such that . Now, this is a circuit that separates and , and it has as the top gate.
-
We repeat the procedure until we arrive at a shallow enough circuit that is supposed to separate some sets and .
-
We prove that cannot separate these sets. Note that if the original circuit made an error in computing and , there always exists a sequence of choices of subcircuits such that the error is traced until .
A “shallow enough circuit” could be, in principle, even a variable, but it turns out that there is a convenient way to argue about circuits of depth in this context. Moreover, for now we assume that these circuits of depth are CNFs/DNFs of width bounded by some parameter . At the end of this section, we discuss why this assumption is acceptable for the proper choice of .
The central notion for analyzing -CNFs and -DNFs is a -limit. The notion comes from [20], inspired by “limit vectors” from [37] as well as communication complexity techniques [25].
Definition 5 ([20]).
Let . is a -limit of , if for any subset of indices there is such that .
At the same time, it is known that a -limit is a complete notion in the following sense.
Claim 7 ([20]).
Let be a set such that every -limit of belongs to . Then there exists a -CNF formula such that .
Proof.
We start from an empty CNF formula and gradually add clauses to it. Consider any . As it is not a -limit of , there exists a set such that for any . Let us add into a clause . This clause evaluates to on and evaluates to on any .
We repeat the procedure for every . The resulting CNF evaluates to on every and evaluates to on any , which proves the claim.
Note that a over variables has at most clauses. The standard assumption for is that the bottom fan-in of the circuit is bounded by the logarithm of its size, so -limits are a tool that helps to prove lower bounds of the form . To be more precise, it follows from Claim 6 that if a set has a -limit outside of , then any CNF recognising it should have size , and it follows from Claim 7 that for any set containing all of its -limits there is a CNF of size recognising . So there is a multiplicative gap of in the exponent between related lower bound and upper bound. In most cases, this is a negligible difference, but for some examples this might be important: for example, Maj function has a lower bound of in depth- and an upper bound of in the same model. Proving a lower bound for Maj would beat all state-of-the-art lower bounds for depth- circuits.
Reducing Bottom Fan-in
Bottom-up lower bounds usually use the fact that bottom fan-in is bounded by a parameter . In most cases, can be made as small as , where is the size of the circuit. This is done by random restrictions, which kill the bottom layer gates with a big fan-in. In case of , this becomes more of a problem, since Xor survives under small restrictions.
In fact, handling the bottom fan-in can be done using top-down techniques. In [17], the lower bound is fully top-down in the sense that no random restrictions are used even for reducing the bottom fan-in, and we follow the same path. With the use of Xor gates, this becomes crucial. The idea is that instead of just one -limit, one needs to find many, so that wide clauses in a CNF could not reject all of them. We make this intuition precise:
Lemma 8.
Let be a CNF over variables of size and . Let be a set of -limits for . Then .
Proof.
Let . Then . Let be the clause with the largest size of , this size is at least since . Now the width of must be larger than , since it distinguishes all -limits in from , hence . The claim then follows.
2.2 Extending the Approach to Parity Gates
We can define the analogous notion for circuits.
Definition 9 (-parity limit).
Let . is a -parity limit of , if for any affine subspace of co-dimension such that it holds that .
The proof of the following claim is analogous to Claim 6. We include the proof for completeness.
Claim 10.
If a circuit accepts a set , then it accepts any -parity limit of .
Proof.
Let be the -parity limit of . Suppose rejects . Then there exists a particular subcircuit of (denote it by ) such that . Let be the affine subspace of co-dimension defined by zeroes of . Then , and therefore . Then for some it holds that and therefore , which is a contradiction with the assumption that accepts the whole .
As there are much more linear subspaces of co-dimension than clauses of width , while we can prove the analogue of Claim 7 for -parity limits, the resulting circuit would have huge size, so this approach would not give a meaningful size upper bound. One could ask a question: is it possible to prove a reasonable upper bound from non-existence of “outer” -parity limits?
Problem 11.
Is -parity limit complete in the following sense: if a set contains all of its -limits, then there is a circuit of width and size such that it accepts exactly set ?
For proving lower bounds against , it is sufficient to find -parity limits only with respect to a fixed set of linear forms present in a circuit (subcircuit), but it would be interesting to know if the more general statement is true. Again, the existence of a -parity limit with respect to a fixed set of linear forms is a necessary condition for a lower bound.
The proof of the next claim is, again, analogous to Claim 6.
Claim 12.
Let be a (- (here is such that is a co-dimension- affine subspace) and let be a collection of affine subspaces of co-dimension such that for all . Suppose that accepts . Consider such that for any , implies that there exists such that . Then accepts .
Here can be a collection of all affine subspaces of co-dimension , or it can be a smaller family of subspaces that still contains all linear systems used in a (-. In other words, as the number of linear systems used in a circuit is bounded by its size, one can relax the definition of a -parity limit to be able to fool only these linear systems. One can also prove a variant of completeness for this weaker notion of -parity limits analogous to Claim 7.
Exponential size , in particular, can use exponential number of different linear forms, with the restriction that inside each subcircuit there are only different linear forms. Our results can be seen as finding -parity limits under these restrictions on the model. In top-down language, the extra Or on top symbolises that the first step down in the proof is oblivious to the actual parity gates that are used in the circuit. Now, just two such oblivious steps would imply lower bounds for .
When comparing top-down lower bounds for plain and , the most important difference (and our main technical contribution) is the following: for , we should be able to construct sets such that we can find their -limits after any change of basis in . Note that the hard functions in this case should be uncorrelated with affine subspaces, which, in particular, is not true for Xor function: after the appropriate change of basis, we could encode the value of the function in the first bit of the string in the new basis.
This seems like a natural step towards fully adapting the top-down approach for circuits with Xor gates. We discuss this further in Section 4.
2.3 Unpredictability and Local Limits
One of the most successful to date ways to find local limits is via unpredictability from partial information.
Let and . A pair with and is a certificate for if there exists such that whenever for , . In this case, we say that contains a certificate for , and the size of such certificate is . This notion was introduced in [28] who proved the following result for .
Lemma 13 (Bit unpredictability [28]).
Let have density . Then for any ,
More recently [17] generalized this result for .
Lemma 14 (Block unpredictability [17]).
Let have density . Then for any ,
Bit and block unpredictability were used in top-down lower bounds for low-depth circuits as a way to extract local limits (Definition 5).
Lemma 15 ([28, 17]).
Suppose does not contain any -certificates for wrt to . Then every such that is a -limit of .
Proof.
Suppose that there exists with that is not a -limit for , i.e. there exists a set of size such that for every we have . Observe that is then a certificate for : indeed for any that agrees with we have that for every we have .
3 Lower Bounds
3.1 Middle Slice
In this section we prove the following.
Theorem 16.
Let be a circuit of the following form. where is a composition of a CNF and an affine transformation of full rank. Suppose that computes the characteristic function of the middle slice . Then the total size of CNFs is at least .
The key ingredient in our proof is a density boosting lemma for affine subspaces. Following a similar definition for boolean subcubes in [3] we say that a set where is a vector space is -linearly spread in if for every affine subspace of co-dimension we have
We remark that the range of interesting values for is , for all sets are spread, for no set is spread. A similar, but different notion was used in [26]. The following is a new density boosting lemma, generalized for affine subspaces, which might be of independent interest. For boolean cubes, such a lemma was introduced in [16] and appears among others in [11].
Lemma 17.
For every set of size at least there exists an affine subspace of of co-dimension at most such that is -linearly spread in and .
Proof.
Suppose that is not -linearly spread in . Then consider the affine subspace of largest co-dimension that witnesses the lack of -spreadness of : suppose that has co-dimension then we have .
We claim then that is -lineraly spread in . Indeed, suppose that it is not, i.e. there exists an affine subspace of of co-dimension (in ) such that . Then which contradicts the maximality of the co-dimension of .
Now it remains to bound the co-dimension of . On the one hand
On the other hand . Hence . The lower bound on follows.
Proof of Theorem 16.
Suppose for contradiction that , where is a constant to choose later. Since , there exists such that .
Thus, there exists a CNF and a full-rank linear transformation such that has size at least and . Let us identify the linear transformation with the matrix in defining it: .
First we apply Lemma 17 to the set with the parameter . We get that there exists an affine space of co-dimension at most such that is -linearly spread in and .
Applying Lemma 13 to the set with we get:
Pick such that this probability is at least . That is, with probability for a pair we have by Lemma 15 that (where ) is a -limit of the set . In order to invoke Lemma 8 we need to find many -limits in , i.e., outside of .
Suppose that for some . Equivalently . Then in particular . Since , this is only possible if has even hamming weight and in that case implies that .
In other words, if adding to preserves its Hamming weight , it means that exactly half of the indices of -coordinates in match up with indices of -coordinates in , which fixes the value of to a constant .
Now consider the affine subspace . If ( is the span of all linear constraints defining ), then or , otherwise has co-dimension in . Let be the event when is in . We then have
Since the co-dimension of (equivalently the dimension of ) is at most and are linearly independent, . On the other hand since implies that and is -linearly spread in we get Therefore so there are -limits to outside of , hence by Lemma 8 we get that
3.2 Affine Disperser
Theorem 18.
Let be any constant in . Let be an affine disperser for dimension such that and be a circuit of the form , where is a composition of a CNF and a linear transformation of full rank. If computes , then the total size of is at least .
Proof.
We show that either or one of the CNFs has size at least , which yields the claim. Suppose . Then there exists such that .
Let . For the set we apply Lemma 14 with the following parameters:
-
the density loss ;
-
the size of certificate ;
-
the size of the unpredictable block .
The constants are to be chosen later. It follows that with probability for and there is no certificate of size in for . Hence, by Lemma 15 all elements of
are -limits of with probability . Let be the set of pairs for which this holds.
For consider the set . is an -dimensional affine subspace of , thus is as well. As is an affine disperser, there is an input , hence is not in and is a -limit of .
Now we need to count the number of -limits we got in order to invoke Lemma 8. Let be the function mapping to (to an arbitrary one, if there are several). Let us upper bound for an arbitrary . Suppose , let , then , hence, there are at most such preimages. Thus we get -limits in total. Therefore by Lemma 8 we get that . Hence for any we get the desired bound.
3.3 Inner Product
In this section, we give an exponential lower bound for -circuit size required to compute the inner product. Our proof is a combination of bottom-up techniques with one top-down-like step.
Theorem 19.
Let be a circuit of the form where each is a composition of a -depth circuit composed with a full-rank affine mapping .
Suppose that computes . Then the total size of circuits is at least .
Proof.
Suppose for contradiction that the total size of all is at most for . Then let us pick and apply the restriction to . Then computes the function and has the same form as before, disjunction of compositions of constant-depth circuits with affine transformations.
Let be such that . Since is balanced, there exists such that . On the other hand for all . Then applying to and to on the right we get that the circuit where and since has full rank .
Now observe that
Hence, there exists a depth- de Morgan circuit that computes parity on bits correctly on all -inputs and on at least -fraction of -inputs. Then let be independent random variables. Then the depth- circuit computes the value of correctly on an input with probability , which exceeds for , hence, there exists a setting of such that computes . Thus by [18] the size of is at least which means that which is a contradiction.
3.4 Proof of Theorem 3
A circuit computing is equivalent to a covering of by affine subspaces . Consider an arbitrary . Affine spaces over are closed under sums of three elements, so let . Then . For we have that for every among exactly one value is and the other two are zeroes. For we can define be such that for every we have and if . Then since for every we have , since otherwise which contradicts . Since this is true for any we get that there exists such that for every and for every we have . Since for every we have we get that . Since we get that , which completes the proof.
4 Discussion and Open Problems
In the results above, having an extra Or on top of the circuit, and only fixing the linear transformation in the subcircuits, can be interpreted in the following way. When implementing the top-down strategy, the first choice of the subcircuit (and the subset of -inputs, respectively), does not depend on the specific linear forms used in the circuit.
In other words, let and for one of the hard functions considered in the main section. Informally, we prove that for any covering of by no more sets (for some ) there is a choice of such that for any affine map there is a -limit for in with respect to that map. Note that for different affine maps, we might find different -limits. For proving lower bounds for , we would need to prove a statement where the last two quantifiers are in a different order: there is a -limit that works for any affine map. Or, at least, for any affine map in a large enough collection of such. As mentioned in Section 2, this corresponds to making two “oblivious” steps down the circuit, where we do not use the knowledge of specific parity gates, while in our lower bound, we make one “oblivious” step.
Note that this is not true for the affine extractors in general, as there is an affine extractor computable by circuits [22]. The middle slice function, however, could still be a good example for honing the top-down techniques.
The first natural step could be finding the same -limit with respect to an arbitrary pair of affine maps. This corresponds to the lower bounds in the following computational model.
Problem 20.
Prove top-down lower bounds for the class of circuits.
In fact, that would already be a step towards another elusive circuit class .Another motivation for this open question comes from the perspective. A gate can be seen as a conjunction of and gates. After appropriately expanding the brackets, can be transformed to a -DNF of conjunctions such that in each conjunction there are only or only gates. So a first related problem would be to adapt the technique for .
Problem 21.
Prove top-down lower bounds for subclasses of .
The next step would be combining the two last problems together. Let be the union of linear maps over () and maps where and . In other words, we can choose a transformation of the inputs that either uses only Xor operations, or only operations.
Problem 22.
Prove lower bounds for - circuits.
Solving this problem would imply lower bounds for .
Claim 23.
Let be such that it is computable by -circuit of size . Then it is computable by of size .
Proof.
See Appendix A.
When proving the results of this form, it all essentially boils down to finding a -(parity) limit. The two known techniques for this are (robust) sunflowers or spreadness [20, 17] and unpredictability [28, 17]. They both have certain downsides. For starters, these techniques only find -limits that are close to the set in Hamming distance (or, in the case of our result, they are close in Hamming distance after a certain affine transformation). In principle, this might not be the case.
Problem 24.
Let be a subset of a code with minimum distance . Can you find a -limit of ?
When looking for a -limit, we can also ask for some structure of the considered set. Let us say that our set is a half of a -wise independent set. From the results of Bazzi [5], Razborov [34], and Braverman [7], we know that roughly half the points of the whole boolean cube should be -limits of the set . However, current techniques do not allow us to find some explicit -limit, assuming the knowledge of . One of the reasons for this is that the size of such sets can be as small as [2].
Problem 25.
Prove a top-down lower bound for separating two disjoint -wise independent sets by depth- circuits.
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Appendix A Proof of Claim 23
Consider a term of . We rewrite it as a -CNF using and gates:
Here , . A -CNF with terms can be transformed into a DNF of size . Now, any term of that DNF has the following form:
Here and are transformations from , and , . Overall, is then computable by a circuit of the following form:
This is a circuit of no greater size than .
