Abstract 1 Introduction 2 Parametric timed automata 3 Parametric disjunctive timed networks 4 Problems for parametric disjunctive timed networks 5 Undecidability results 6 Decidability results 7 Conclusion References Appendix A Proofs of Section 5 Appendix B Proofs of Section 6

Parametric Disjunctive Timed Networks

Étienne André ORCID Université Sorbonne Paris Nord, LIPN, CNRS UMR 7030, Villetaneuse, France
Institut universitaire de France (IUF), Paris, France
Nantes Université, CNRS, LS2N, Nantes, Bretagne, France
Swen Jacobs ORCID CISPA Helmholtz Center for Information Security, Saarbrücken, Germany Engel Lefaucheux ORCID Université de Lorraine, CNRS, Inria, LORIA, F-54000 Nancy, France
Abstract

We consider distributed systems with an arbitrary number of processes, modelled by timed automata that communicate through location guards: a process can take a guarded transition if at least one other process is in a given location. In this work, we introduce parametric disjunctive timed networks, where each timed automaton may contain timing parameters, i.e., unknown constants. We investigate two problems: deciding the emptiness of the set of parameter valuations for which 1) a given location is reachable for at least one process (local property), and 2) a global state is reachable where all processes are in a given location (global property). Our main positive result is that the first problem is decidable for networks of processes with a single clock and without invariants; this result holds for arbitrarily many timing parameters – a setting with few known decidability results. However, it becomes undecidable when invariants are allowed, or when considering global properties, even for systems with a single parameter. This highlights the significant expressive power of invariants in these networks. Additionally, we exhibit further decidable subclasses by restraining the syntax of guards and invariants.

Keywords and phrases:
parametrised verification, parametric timed automata, verification of infinite-state systems
Funding:
Étienne André: Partially supported by ANR TAPAS (ANR-24-CE25-5742).
Engel Lefaucheux: Partially supported by ANR GUMMIS (ANR-25-CE48-5096).
Copyright and License:
[Uncaptioned image] © Étienne André, Swen Jacobs, and Engel Lefaucheux; licensed under Creative Commons License CC-BY 4.0
2012 ACM Subject Classification:
Software and its engineering Model checking
Related Version:
Full version including proof of Theorem 20: https://www.doi.org/10.48550/arXiv.2512.04991 [14]
Funding:
This work is partially supported by ANR BisoUS (ANR-22-CE48-0012).
Editors:
Stefano Guerrini and Barbara König

1 Introduction

Parametrised verification [19, 2, 6] consists in verifying a system’s behaviour across all possible configurations of a certain parameter, such as the number of processes. It is most commonly used in the context of networks of identical finite-state processes, and it involves proving that a property holds for any number of processes. This type of verification is crucial for distributed systems, where an arbitrary number of identical agents may be interacting, and ensures that system correctness is maintained no matter the scale of the system.

When timing constraints are involved, more powerful formalisms are needed. Timed automata (TAs) [7] extend finite-state automata with clocks (measuring the time elapsing), and offer a powerful framework for the specification and verification of real-time systems. Clock constraints are used to constrain the time to remain in a location (“invariant”) or to take a transition (“guard”).

Several works consider parametrised verification for networks of timed automata [5, 4, 1, 3], showing that it quickly hits undecidability, notably when multiple clocks are involved. Decidability in the presence of multiple clocks can be preserved by restricting the communication between processes, e.g., to communication via location guards: a process can take a transition guarded by a location if at least one other process currently occupies . In disjunctive timed networks, where identical processes communicate via such location guards, local reachability and safety properties can be decided for any number of clocks [35, 12], even in the presence of invariants [13].

When timing constants are not known with full precision (or completely unknown, e.g., at the beginning of the design phase), timed automata may become impractical. Parametric timed automata (PTAs) [8] address this issue by allowing the modelling and verification of real-time systems with unknown or variable timing constants modelled as timing parameters. This flexibility enables the analysis of system behaviour across a range of parameter valuations, ensuring correctness under diverse conditions and facilitating optimization of parameters.

Common decision problems for parametric timed automata also quickly hit undecidability: emptiness of the parameter valuations set for which a given location is reachable (“reachability-emptiness”), for a single PTA, is undecidable with as few as 3 clocks and a single timing parameter (see [9] for a survey).

Contributions

In this paper, we address the verification of systems with unknown timing constants over an arbitrary number of processes. In that sense, this parametrised parametric timed setting can be seen as having parameters in two dimensions: timing parameters, and number of processes. We introduce parametric disjunctive timed networks (PDTNs) as networks of identical parametric timed processes resembling PTAs, and communicating via location guards. A combination of two types of parameters appears natural, especially when designing and verifying communication protocols. These protocols must function regardless of the number of participants (hence the parametric size of networks), while timing parameters allow designers to adjust critical time constraints in each process during early stages of development.

Motivating example.

We consider an example inspired by applications in the verification of asynchronous programs [24, 13]. In this setting, processes (or threads) can be “posted” at runtime to solve a task, and will terminate upon completing the task. Our example, depicted in Figure 1, features one clock x per process; symbols σi are transition labels of the automaton. An unbounded number of processes start in the initial location 𝗂𝗇𝗂𝗍. In the inner loop, a process can move to location 𝗅𝗂𝗌𝗍𝖾𝗇 in order to see whether an input channel carries data. Once it determines that this is the case (in our example this always happens after some time), it moves to location 𝗉𝗈𝗌𝗍, which gives the command to post a process that actually reads the data, and then can return to 𝗂𝗇𝗂𝗍. In the outer loop, if there is a process that gives the command to read data, i.e., a process that is in 𝗉𝗈𝗌𝗍, then another process can accept that command and move to 𝗋𝖾𝖺𝖽𝗂𝗇𝗀. After reading for some time, the process will either determine that all the data has been read and move to 𝖽𝗈𝗇𝖾, or it will timeout and move to 𝗉𝗈𝗌𝗍 to ask another process to carry on reading. However, this scheme may run into an error if there are processes in 𝖽𝗈𝗇𝖾 and 𝗋𝖾𝖺𝖽𝗂𝗇𝗀 at the same time, modelled by a transition from 𝗋𝖾𝖺𝖽𝗂𝗇𝗀 to 𝖾𝗋𝗋𝗈𝗋 that can only be taken if 𝖽𝗈𝗇𝖾 is occupied. The time to move to 𝖾𝗋𝗋𝗈𝗋 is parametric, and should be greater than the (unknown) duration p. A natural problem is to identify valuations of p for which 𝖾𝗋𝗋𝗈𝗋 is unreachable regardless of the number of processes.

Figure 1: Asynchronous data read example (variation from [13]).
Problems.

We focus here on the parametrised reachability-emptiness problem: decide the emptiness of the set of timing parameter valuations for which there exists a number of processes such that a given configuration is reachable.

We consider both local properties (reachability condition involving one process), and global properties (which can express the absence of deadlocks, or the fact that all processes must reach a given location).

We also distinguish the presence or the absence of invariants – and we will see that this makes a critical difference in decidability.

In this paper, we prove several results regarding parametrised reachability-emptiness:

  • undecidability of local properties for PDTNs with 1 clock, 1 parameter, with invariants (Section 5.2).

  • undecidability of global properties for PDTNs with 1 clock, 1 parameter, with or without invariants (Section 5.3).

  • decidability for fully parametric PDTNs with 1 parameter (Section 6.1);

  • decidability for PDTNs when parameters are partitioned into lower-bound and upper-bound parameters (Section 6.2);

  • decidability of local properties for PDTNs with 1 clock, arbitrarily many parameters, without invariants (Section 6.3).

The most surprising result emphasizes the high expressive power of invariants (something which has no impact in single PTAs): local properties in PDTNs are decidable without invariants but become undecidable in their presence, for only 1 clock. In addition, both local and global properties are undecidable with invariants for a single clock and a single parameter – a setting decidable in the context of PTAs taken in isolation: that is to say, while the communication primitive is weak, it is sufficiently expressive to encode models such a 2-counter machines.

Additionally, both as a proof ingredient and as an interesting result per se, we show in Section 5.1 that the reachability-emptiness problem is undecidable for 1 clock, 1 parameter, with and without invariants and any a priori fixed number (3) of processes – even though the parametrised version of this problem, i.e., for any (non a priori fixed) number of processes, is decidable.

Related work.

The concept of identical processes in a timed setting was mainly addressed in networks of processes that either communicate via k-wise synchronization [5, 4, 3] or via location guards [35, 12, 13]. The former model is equivalent to a variant of timed Petri nets [33, 31, 25, 20], whereas the latter would be equivalent to a form of timed Petri nets restricted to immediate observation steps (as in [23, 34]), which however have not been studied separately to the best of our knowledge.

Very few works study decidability results when combining two types of parameters, i.e., discrete (number of processes) and continuous (timing parameters). In [21, 30], security protocols are studied with unknown timing constants, and an unbounded number of participants. However, the focus is not on decidability, and the general setting is undecidable. In [15], action parameters (that can be seen as Boolean variables) and continuous timing parameters are combined (only linearly though) in an extension of PTAs; the mere emptiness of the sets of action and timing parameters for which a location is reachable is undecidable. In contrast, we exhibit in this work some decidable cases.

The closest work to ours, and presumably the only one to consider timing parameters in the setting of parametrised verification, is in [11] where parametric timed broadcast protocols (PTBPs) are introduced. Our contributions differ in the communication setting: while we consider location guards, [11] considers broadcast in cliques (in which every message reaches every process) and in reconfigurable topologies (in which the set of receivers is chosen non-deterministically). Moreover, in this work we study the power of invariants, which are absent from [11]. Our decidability results are also significantly better than in [11]: In [11], parametrised reachability-emptiness (for local properties) is undecidable for PTBPs composed of general PTAs, even with a single clock and without invariants, both in the reconfigurable semantics and in the clique semantics. The only decidable subcase (for both semantics) for reachability-emptiness in [11] is severely restricted with 3 conditions that must hold simultaneously: a single clock per process, parameters partitioned into lower-bound and upper-bound parameters, and bounded (possibly rational-valued) parameters – relaxing any of these conditions leads to undecidability. In contrast, we prove here decidability for general PDTNs with 1 clock and arbitrarily many parameters, or for parameters partitioned into lower-bound and upper-bound. Also note that our results do not reuse any proof ingredients from [11] due to the different communication.

Outline.

We recall the necessary material in Section 2. We formalize parametric disjunctive timed networks in Section 3, and our problem in Section 4. We prove undecidability results in Section 5 and decidability results in Section 6. We conclude in Section 7.

2 Parametric timed automata

We denote by ,>0,,0 the sets of non-negative integers, strictly positive integers, integers, and non-negative reals, respectively.

Clocks are real-valued variables that all evolve over time at the same rate. Throughout this paper, we assume a set 𝕏={x1,,xH} of clocks. A clock valuation is a function μ:𝕏0, assigning a non-negative value to each clock. We write 0 for the clock valuation assigning 0 to all clocks. Given R𝕏, we define the reset of a valuation μ, denoted by [μ]R, as follows: [μ]R(x)=0 if xR, and [μ]R(x)=μ(x) otherwise. Given a constant d0, μ+d denotes the valuation s.t. (μ+d)(x)=μ(x)+d, for all x𝕏.

A (timing) parameter is an unknown integer-valued constant. Throughout this paper, we assume a set ={p1,,pM} of parameters. A parameter valuation v is a function v:.

A constraint C is a conjunction of inequalities over 𝕏 of the form x1iMαi×pi+d, with x𝕏, {<,,=,,>}, pi, and αi,d. We call d a constant term. Given C, we write μv(C) if the expression obtained by replacing each x with μ(x) and each pi with v(pi) in C evaluates to true. Let Φ(𝕏) denote the set of constraints over 𝕏. Let 𝑇𝑟𝑢𝑒 denote the constraint made of no inequality, i.e., representing the whole set of clock and parameter valuations.

Definition 1 (PTA [8]).

A PTA 𝒜 is a tuple 𝒜=(Σ,L,0,𝕏,,I,E), where:

  1. 1)

    Σ is a finite set of actions;

  2. 2)

    L is a finite set of locations;

  3. 3)

    0L is the initial location;

  4. 4)

    𝕏 is a finite set of clocks;

  5. 5)

    is a finite set of parameters;

  6. 6)

    I:LΦ(𝕏) is the invariant, assigning to every L a constraint I() over 𝕏;

  7. 7)

    EL×Φ(𝕏)×Σ×2𝕏×L is a finite set of edges τ=(,g,a,R,) where ,L are the source and target locations, g is a constraint (called guard), aΣ, and R𝕏 is a set of clocks to be reset.

We say that a location does not have an invariant if I()=𝑇𝑟𝑢𝑒.

Definition 2 (Valuation of a PTA).

Given a PTA 𝒜 and a parameter valuation v, we denote by v(𝒜) the non-parametric structure where all occurrences of a parameter pi have been replaced by v(pi). v(𝒜) is a timed automaton.

We recall the concrete semantics of a TA using a timed transition system (TTS).

Definition 3 (Semantics of a TA).

Given a PTA 𝒜=(Σ,L,0,𝕏,,I,E) and a parameter valuation v, the semantics of v(𝒜) is given by the TTS 𝔗v(𝒜)=(𝔖,𝔰0,Σ0,), with

  1. 1.

    𝔖={(,μ)L×0Hμv(I())}, 𝔰0=(0,0),

  2. 2.

    consists of the discrete and (continuous) delay transition relations:

    1. (a)

      discrete transitions: (,μ)τ(,μ), if (,μ),(,μ)𝔖, and there exists τ=(,g,a,R,)E, such that μ=[μ]R, and μv(g).

    2. (b)

      delay transitions: (,μ)d(,μ+d), with d0, if d[0,d],(,μ+d)𝔖.

Moreover we write (,μ)(d,τ)(,μ) for a combination of a delay and a discrete transition if μ′′:(,μ)d(,μ′′)τ(,μ).

Given a TA A with concrete semantics 𝔗A, we refer to the states of 𝔖 as the concrete states of A. A run of A is an alternating sequence of concrete states of A and pairs of delays and edges starting from the initial state 𝔰0 of the form (0,μ0),(d0,τ0),(1,μ1), with i=0,1,, τiE, di0 and (i,μi)(di,τi)(i+1,μi+1). Given a TA A, we say that a location is reachable if there exists a state (,μ) that appears on a run of A.

Reachability-emptiness.

Given a PTA 𝒜 and a location , the reachability-emptiness problem asks whether the set of parameter valuations v such that is reachable in v(𝒜) is empty.

Definition 4 (L/U-PTA [27]).

An L/U-PTA (lower-bound/upper-bound PTA) is a PTA where is partitioned into =LU, where L (resp. U) denotes lower-bound (resp. upper-bound) parameters, so that each lower-bound (resp. upper-bound) parameter pi must be such that, for every constraint x1iMαi×pi+d, we have:

  1. 1)

    {,<} implies αi0 (resp. αi0), and

  2. 2)

    {,>} implies αi0 (resp. αi0).

A PTA is fully parametric whenever it has no constant term (apart from 0):

Definition 5 (Fully parametric PTA [27, Definition 4.6]).

A PTA 𝒜 is fully parametric if every constraint in 𝒜 is of the form x1iMαi×pi, with pi and αi.

Our subsequent undecidability proofs work by reduction from the halting problem for 2-counter machines. We borrow the following material from [17]. A deterministic 2-counter machine (“2CM”) [32] has two non-negative counters 𝒞1 and 𝒞2, a finite number of states and a finite number of transitions, which can be of the form (for l{1,2}):

  1. i)

    “when in state 𝚚i, increment 𝒞l and go to 𝚚j”; or

  2. ii)

    “when in state 𝚚i, if 𝒞l=0 then go to 𝚚k, otherwise decrement 𝒞l and go to 𝚚j”.

The 2CM starts in state 𝚚0 with the counters set to 0. The machine follows a deterministic transition function, meaning for each combination of state and counter conditions, there is exactly one action to take. The halting problem consists in deciding whether some distinguished state called 𝚚halt can be reached or not. This problem is known to be undecidable [32].

3 Parametric disjunctive timed networks

We extend guarded TAs defined in [12] with timing parameters as in PTAs. We follow the terminology and use abbreviations from [35, 12].

Definition 6 (Guarded Parametric Timed Automaton (gPTA)).

A gPTA 𝒜 is a tuple 𝒜=(Σ,L,0,𝕏,,I,E), where:

  1. 1)

    Σ is a finite set of actions;

  2. 2)

    L is a finite set of locations;

  3. 3)

    0L is the initial location;

  4. 4)

    𝕏 is a finite set of clocks;

  5. 5)

    is a finite set of parameters;

  6. 6)

    I:LΦ(𝕏) is the invariant, assigning to every L a constraint I() (called invariant);

  7. 7)

    EL×Φ(𝕏)×(L{})×Σ×2𝕏×L is a finite set of edges τ=(,g,γ,a,R,) where ,L are the source and target locations, g is a constraint (called guard), γ is the location guard, aΣ, and R𝕏 is a set of clocks to be reset.

Intuitively, an edge τ=(,g,γ,a,R,)E takes the automaton from location to ; τ can only be taken if guard g and location guard γ are both satisfied, and it resets all clocks in R. Note that satisfaction of location guards is only meaningful in a network of gPTAs (defined below). Intuitively, a location guard γ is satisfied if it is or if another automaton in the network currently occupies location γ.

Example 7.

In Figure 1, the transition to 𝖾𝗋𝗋𝗈𝗋 is guarded both by a guard x>p and by a location guard [𝖽𝗈𝗇𝖾]. In contrast, the location guard to 𝖽𝗈𝗇𝖾 is (and omitted in the figure), i.e., it can be taken without assumption on the location of other processes.

A gPTA is an L/U-gPTA if parameters are partitioned into lower-bound and upper-bound parameters (as in Definition 4). A gPTA is fully parametric whenever it has no constant term (apart from 0) in its guards and invariants, similarly to Definition 5.

Recalling the semantics of NTAs.

A gPTA with = is called a guarded timed automaton (gTA) [12]. Given a gPTA 𝒜 and a parameter valuation v, we denote by v(𝒜) the non-parametric structure where all occurrences of a parameter pi have been replaced by v(pi); v(𝒜) is a gTA.

Let A be a gTA. We denote by An the parallel composition AA of n copies of A, also called a network of timed automata (NTA) of size n. Each copy of A in the NTA An is called a process. A configuration 𝔠 of an NTA An is a tuple 𝔠=((1,μ1),,(n,μn)), where every (i,μi) is a concrete state of A. The semantics of An can be defined as a TTS (,𝔠^,T), where denotes the set of all configurations of An, 𝔠^ is the unique initial configuration (0,𝟎)n, and the transition relation T is the union of the following delay and discrete transitions:

delay transition

((1,μ1),,(n,μn))𝑑((1,μ1+d),,(n,μn+d)), with d0, if i{1,,n},d[0,d]:μi+dI(i), i.e., we can delay d0 units of time if all clock invariants are satisfied until the end of the delay.

discrete transition

((1,μ1),,(n,μn))(i,a)((1,μ1),,(n,μn)) for some i{1,,n} if

  1. 1)

    (i,μi)𝜏(i,μi) is a discrete transition111Strictly speaking, (i,μi)𝜏(i,μi) is a transition of the TA obtained from A by replacing location guards with . of A with τ=(i,g,γ,a,R,i) for some g, γ and R,

  2. 2)

    γ= or j=γ for some j{1,,n}{i}, and

  3. 3)

    j=j and μj=μj for all j{1,,n}{i}.

That is, location guards γ are interpreted as disjunctive guards: unless γ=, at least one of the other processes needs to occupy location γ in order for process i to pass this guard.

We write 𝔠d,(i,a)𝔠′′ for a delay transition 𝔠𝑑𝔠 followed by a discrete transition 𝔠(i,a)𝔠′′. Then, a timed path of An is a finite sequence π=𝔠0d0,(i0,a0)dl1,(il1,al1)𝔠l. A timed path π of An is a computation if 𝔠0=𝔠^. We say that 𝔠l is reachable in An.

We write 𝔠 if 𝔠=((1,μ1),,(n,μn)) and =i for some i{1,,n}. We say that a location is reachable in An if there exists a reachable configuration 𝔠 s.t. 𝔠.

Given a gPTA 𝒜, we denote by 𝒜n the parallel composition 𝒜𝒜 of n copies of 𝒜, also called a network of parametric timed automata (NPTA). Given an NPTA 𝒜n and a parameter valuation v, we denote by v(𝒜n) the non-parametric structure where all occurrences of a parameter pi have been replaced by v(pi); note that v(𝒜n) is an NTA.

Definition 8.

A given gPTA 𝒜 induces a parametric disjunctive timed network (PDTN) 𝒜, defined as the following family of NPTAs: 𝒜={𝒜nn>0}.

Given a parametric disjunctive timed network 𝒜 and a parameter valuation v, (v(𝒜)) is a disjunctive timed network (DTN) [35].

Given a location of a gPTA 𝒜, given a parameter valuation v, we say that is reachable in the DTN (v(𝒜)) if there exists n>0 such that is reachable in (v(𝒜))n.

Subclasses of PDTNs.

A PDTN 𝒜 induced by a gPTA 𝒜 is an L/U-PDTN if 𝒜 is an L/U-gPTA. Similarly, 𝒜 is a fully parametric PDTN if 𝒜 is a fully parametric gPTA.

4 Problems for parametric disjunctive timed networks

Reachability.

In [12], the parametrised reachability problem (PR) consists in deciding whether, given a gTA A and a location , there exists n such that is reachable in An. Here, we consider a parametric version. The emptiness extension consists in asking whether the set of timing parameter valuations for which PR holds is empty.

Parameterized reachability-emptiness problem (PR-e):
Input: a gPTA 𝒜 and a location
Problem: Decide the emptiness of the set of timing parameter valuations v for which is reachable in (v(𝒜)).

Example 9.

In Figure 1, PR-e with 𝖾𝗋𝗋𝗈𝗋 as target location does not hold: for v(p)=1, location 𝖾𝗋𝗋𝗈𝗋 can be reached for 3 processes.

Without invariants, |L| is a cutoff (i.e., a number of processes above which the reachability is homogeneous – better cutoffs are known for local properties). Intuitively, this is because, without invariants, a single process that reaches such a location can stay there and enable the guard forever. However, with invariants, such a simple cutoff does not work (even in the absence of timing parameters), since invariants might force a process to leave a location and lots of different processes might be needed to occupy a location at different points in time.

Global reachability.

Global properties refer to the numbers of processes in given locations; we express these using constraints. Formally, a global reachability property is defined by a constraint φ in the following grammar: φ::=#1#=0φφφφ, where L and # refers to the number of processes in . Note that the “#=0” term is responsible for the “global” nature of such properties, i.e., it must hold for all processes that they are not in . The satisfaction of a constraint φ by 𝔠=((1,μ1),,(n,μn)) is defined naturally: 𝔠#1 if 𝔠; 𝔠#=0 if 𝔠; and as usual for Boolean combinations. The parametrised global reachability problem (PGR) consists in deciding whether, given a gTA A and a global reachability property φ, there exists n such that a configuration 𝔠 with 𝔠φ is reachable in An. Again, we extend this problem to the emptiness of the set of timing parameters:

Parameterized global reachability-emptiness problem (PGR-e):
Input: a gPTA 𝒜 and a global reachability property φ
Problem: Decide the emptiness of the set of timing parameter valuations v for which a configuration 𝔠 with 𝔠φ is reachable in (v(𝒜)).

As special cases, the parametrised global reachability problem includes control-state reachability (where φ is #1 for a single location ; also expressible as a PR-e problem) and detection of timelocks that are due to location guards (where φ is a disjunction over conjunctions of the form #1#1=0#m=0, where can only be left through edges guarded by one of the 1,,m). We will be particularly interested in the global property asking whether all processes reach a given final configuration (where φ is of the form #1=0#m=0 with m=|L|1), sometimes called the target problem [22].

Example 10.

In Figure 1, consider the global property φ stating that all processes must be in 𝖾𝗋𝗋𝗈𝗋. This property can be written as #𝗂𝗇𝗂𝗍=0#𝗅𝗂𝗌𝗍𝖾𝗇=0#𝗉𝗈𝗌𝗍=0#𝗋𝖾𝖺𝖽𝗂𝗇𝗀=0#𝖽𝗈𝗇𝖾=0; then, PGR-e holds: no parameter valuation can allow all processes to be simultaneously in 𝖾𝗋𝗋𝗈𝗋, whatever the number of processes (this comes from the fact that the transition to 𝖾𝗋𝗋𝗈𝗋 is guarded by 𝖽𝗈𝗇𝖾, so at least one process must be elsewhere).

5 Undecidability results

5.1 Fixed number of processes

We first consider a fixed number of processes; the problem addressed here is therefore not (yet) parametrised reachability-emptiness, but only reachability-emptiness. These results will be used as important proof ingredients for the results in Sections 5.2 and 5.3. (Then, the three results in Section 6 use 3 different proof techniques, completely different from this one.)

5.1.1 Undecidability for 3 processes

In the following, we show that the emptiness of the parameter valuations set for which a location is reachable in an NPTA made of exactly 3 processes (“reachability-emptiness”) is undecidable. We first prove the result with invariants (Proposition 13), and then show it also holds without (Proposition 14). The idea is that invariants are not needed for 3 processes, but will be necessary when proving undecidability for an unbounded number of processes (Theorem 16).

Before that, we first reprove a well-known result stating that reachability-emptiness is undecidable for PTAs with 3 clocks and a single parameter. This result was already proved (with 3 or more clocks) in, e.g., [8, 18, 16] with various proof flavors. The construction we introduce in the proof of Lemma 11 will be then reused and modified in the proof of Proposition 13, which is why we give it first with full details.

(a) Initial gadget: single PTA version.
(b) Initial gadget: gadget simulating t.
(c) Initial gadget: gadget simulating x1.
(d) Initial gadget: gadget simulating x2.
(e) Initial gadget: global gadget as a single gPTA.
(f) Final gadget as a single gPTA.
Figure 2: Initial and final gadgets.
Lemma 11.

Reachability-emptiness is undecidable for PTAs with 3 clocks and 1 parameter.

Proof.

We reduce from the halting problem of 2-counter machines, which is undecidable [32]. Given a 2CM , we encode it as a PTA 𝒜. Let us describe this encoding in detail, as we will modify it in the subsequent proofs.

Each state 𝚚i of the machine is encoded as a location of the PTA, which we call qi. The counters are encoded using clocks t, x1 and x2 and one integer-valued parameter p, with the following relations with the values c1 and c2 of counters 𝒞1 and 𝒞2: when t=0, we have x1=c1 and x2=c2. This clock encoding is classical for integer-valued parameters, e.g., [18, 16]. The parameter typically encodes the maximal value of the counters along a run.

We initialize the clocks with the gadget in Figure 2(a) (that also blocks the case where p1). Note that, throughout the paper, we highlight in thick green style the locations of the PTA corresponding to a state of the 2CM (in contrast with other locations added in the encoding to maintain the matching between the clock values and the counter values). Since all clocks are initially 0, in Figure 2(a) clearly, when in q0 with t=0, we have x1=x2=0, which indeed corresponds to counter values 0.

We now present the gadget encoding the increment instruction of 𝒞1 in Figure 3(a). The edge from qi to i1 only serves to clearly indicate the entry in the increment gadget and is done in 0 time unit. Since every edge is guarded by one equality, there are really only two timed paths that go through the gadget: one going through i2 and one through i2, depending on the respective order between c1 and c2. Observe that on both timed paths the gadget lasts exactly p time units (due to the guards and resets of t). In addition, x2 is reset exactly when it equals p, hence its value when entering the gadget is identical to its value when reaching qj. Therefore c2 is unchanged. Now, x1 is reset when it equals p1, hence its value after the gadget of duration p is incremented by 1 compared to its value when entering the gadget. Therefore c1 is incremented by 1 when reaching qj, as expected.

(a) Increment 𝒞1: single PTA version.
(b) Increment 𝒞1: gadget simulating t.
(c) Increment 𝒞1: gadget simulating x1.
(d) Increment 𝒞1: gadget simulating x2.
Figure 3: Increment gadget.
(a) 0-test and decrement (𝒞1): single PTA version.
(b) 0-test and decrement (𝒞1): gadget simulating t.
(c) 0-test and decrement (𝒞1): gadget simulating x1.
(d) 0-test and decrement (𝒞1): gadget simulating x2.
Figure 4: 0-test and decrement gadget.

Let us now consider the 0-test and decrement gadget. Decrement is done similarly to increment, by replacing guards x1=p1 with x1=p+1, as shown in Figure 4(a). In addition, the 0-test is obtained by simply testing that x1=0 whenever t=0 (which ensures that c1=0), which is done on the guard from qj to k1; we then force exactly p time units to elapse (and reset each clock when it reaches p), which means that the values of the clocks when leaving the gadget are identical to their value when entering. This is not strictly speaking needed here, but this time elapsing will simplify the proof of Proposition 13. Dually, the guard from qi to i1 ensures that decrement is done only when the counter is not null.

All those gadgets also work for counter 𝒞2 by swapping x1 and x2.

The actions associated with the edges do not matter; we can assume a single action a on all edges (omitted in all figures).

We now prove that the machine halts iff there exists a parameter valuation v such that v(𝒜) reaches location qhalt. First note that if p1 the initial gadget cannot be passed, and so the machine does not halt. Assume p>1. Consider two cases:

  1. 1.

    either the value of the counters is not bounded (and the 2CM does not halt). Then, for any parameter valuation, at some point during an increment of, say, 𝒞1 we will have c1>p and hence x1>p1 when taking the edge from i2 to i3 and the PTA will be blocked. Therefore, there exists no parameter valuation for which the PTA can reach qhalt.

  2. 2.

    or the value of the counters remains bounded. Let c𝑚𝑎𝑥 be their maximal value. Let us consider two subcases:

    1. (a)

      either the machine reaches 𝚚halt: in that case, if c𝑚𝑎𝑥p, then the PTA valuated with such parameter valuations correctly simulates the machine, yielding a (unique) run reaching location qhalt.

    2. (b)

      or the machine does not halt. Then again, for a sufficiently large parameter valuation (i.e., p>c𝑚𝑎𝑥), the machine is properly simulated, and since the machine does not halt, then the PTA never reaches qhalt. For other values of p, the machine will block at some point in an increment gadget, because p is not large enough and the guard in the increment gadget cannot be satisfied.

Hence the machine halts iff there exists a parameter valuation v such that v(𝒜) reaches qhalt.

 Remark 12.

Observe that the proof of Lemma 11 does not require invariants, so undecidability holds without invariants as well – a result known since [8].

We now prove undecidability of the reachability-emptiness in NTA with exactly 3 processes, by rewriting the 2CM encoding from the former proof.

Proposition 13.

Assume a gPTA 𝒜 with invariants, with a single clock and a single parameter, and one of its locations. Deciding the emptiness of the set of timing parameter valuations v for which is reachable in the NTA v(𝒜)3 is undecidable, for all such 𝒜.

Proof.

The proof main technicality is to rewrite the 2CM encoding of Lemma 11 (made of a PTA with 3 clocks) using 3 processes with 1 clock each. This is not trivial as the communication model between our gPTAs is rather weak. Recall that the parameter encodes typically the maximal valuation of the counters, and can therefore be arbitrarily large; we can assume without loss of generality that p>1. Here, we use three different gPTAs (each featuring a single clock) synchronizing together; of course, strictly speaking, we can use only a single structure, but with three “subparts”, and we ensure that each of the 3 processes will go into a different subpart of the gPTA. This is ensured by the initial gadget in Figure 2(e): in order for process 1 to reach location q0t, then, due to the location guards, exactly one other process must have selected the second subpart (location 11) while the third process must have selected the third subpart (location 12).

Each instruction of the 2CM is encoded into a gadget connected with each other, for each of the three subparts.

In the rest of the proof, we therefore give, for each instruction of the 2CM, one gadget for each of the three subparts. Obviously, the (unique) gPTA features a single clock (“x” in Figure 2(e)); however, for sake of readability, and for consistency with the encoding given in Lemma 11, we use clocks with different names in the 3 subparts: that is, the initial gadget in Figure 2(e) can be described by three gadgets for the three subparts, given in Figures 2(b), 2(c), and 2(d), with clock names t, x1 and x2. Also recall that from Definition 6, clocks are not shared – they cannot be read from another process.

Let us consider the increment gadget: the decomposition into three “subparts” (for each of the three processes) is given in Figures 3(b), 3(c), and 3(d). An invariant “” denotes the fact that the actual invariant is given in the “next” gadget starting from that location. Note that it takes exactly p time units to move from qit to qjt. In addition, the outgoing transition from a given qit is always done in 0-time, which is enforced by the invariant t=0; therefore, the location guard [qjt] together with the guard x2p is exactly equivalent to t=px2p, forcing the subparts simulating x1 and x2 to properly synchronize with the subpart simulating t (or getting stuck forever in i1 or i2 and blocking the whole computation). Therefore, all three gadgets synchronize as expected, simulating the original increment gadget in Figure 3(a).

Let us now consider the 0-test and decrement gadget: the decomposition into three “subparts” (for each of the three processes) is given in Figures 4(b), 4(c), and 4(d). This time, compared to the former gadgets, we need a better synchronization between gadgets to ensure the correct branching depending on the value of c1. If c1=0, then x1=0 when t=0, and therefore the process simulating x1 can move in 0-time to k1, since qit is occupied; then, again in 0-time, the process simulating t can move to kt, ensuring the correct synchronization between both processes in the correct branch. Note that, because of the invariant in qit, the process simulating t can only stay 0 time unit in qit, and therefore in the process simulating x1 the guard x1=0 together with location guard [qjt] is exactly equivalent to x1=0t=0, which correctly encodes the 0-test. Conversely, if c1>0, then the process simulating x1 can move in 0-time to i11, since qit is occupied; then, again in 0-time, the process simulating t can move to it. Similarly, the process simulating x2 follows the right branch thanks to location guards [it] and [kt]. The rest of the decrement part (from i to j) works similarly to the increment gadget, and the correctness argument is the same. Recall that the rest of the 0-test gadget forces time to elapse for p units, without modifying the value of the three clocks when leaving the gadget (except of course for x1 in case of decrement). In particular, in the gadget simulating x2 (Figure 4(d)), x2 has exactly the same value when entering qk2 as when entering qi2 due to location guard [qkt], and the intermediate location resetting x2 when it is exactly p; the same holds in the decrement part of the gadget.

In the encoding in the proof of Lemma 11, we showed that the 2CM reaches 𝚚halt iff the location qhalt is reachable. Here, due to the split of the encoding into three subparts, we need a final gadget, given in Figure 2(f) (we assume the clock is reset when entering locations qhaltt, qhalt1 and qhalt2). In order for the first process to reach the (new) location qhalt, we need all three processes to reach their respective final location (i.e., qhaltt, qhalt1 and qhalt2) together, which is easily achieved thanks to the various location guards done in 0-time. (Note that this gadget actually allows all processes to reach 𝚚halt; so far, we only need one process to do so.)

Now, first note that the subpart simulating t progresses in its gadgets, only synchronizing with the two other processes in the initial and final gadgets, as well as in the 0-test and decrement. In contrast, the two subparts simulating x1 and x2 constantly synchronize with the location guards from the first subpart; while nothing forces them to take these transitions (notably those guarded by [qjt]), failing in taking such a transition will immediately lead to a timelock due to the invariants and to the fact that the next time such a location guard will be available is necessarily in p time units. More in detail, recall that any guard location (location used in a location guard) qit in the subpart simulating t has an invariant t=0, and only outgoing transitions guarded with t=0. In addition, at least p time units must elapse between two guard locations in the subpart simulating t: so, due to the invariants in the two other subparts, failing to take a location guard renders impossible to take it the next time the first subpart will be in a guard location.

For all these reasons, if one process reaches qhalt, then from Figure 2(f), two other processes must have traversed the two other subparts (simulating x1 and x2) correctly, by synchronizing with the first process. Hence, the 2CM is correctly simulated.

The rest of the reasoning follows the proof of Lemma 11: the 2CM halts iff there exists a parameter valuation v such that v(𝒜)3 reaches qhalt.

We show that the absence of invariants does not avoid undecidability, for exactly 3 processes.

Proposition 14.

Assume a gPTA 𝒜 with a single clock and a single parameter, and one of its locations. Deciding the emptiness of the set of timing parameter valuations v for which is reachable in the NTA v(𝒜)3 is undecidable, even without invariants, for all such 𝒜.

Proof sketch.

The idea is that, if a process “chooses” to not take some outgoing transition in the absence of invariants, then the whole computation is stuck, and qhalt is unreachable. Put it differently, while the absence of invariants may add some runs, none of these runs can reach qhalt, and the final correctness argument of the proof of Proposition 13 still holds. See Section A.1.

5.1.2 Undecidability for any fixed number of processes (with or without invariants)

By modifying the constructions in the proof of Proposition 14, it is easy to show that, for any fixed number of processes n3, the reachability-emptiness problem is undecidable, even without invariants. Note that our construction differs for any n3, and hence this does not prove the undecidability of the parametrised-reachability-emptiness problem (which is actually decidable without invariants, see Theorem 20).

Proposition 15.

Let 𝒜 be a gPTA, and one of its locations. For any n3, deciding the emptiness of the set of timing parameter valuations v for which is reachable in the NTA v(𝒜)n is undecidable, even when 𝒜 contains a single clock and a single parameter without invariants.

Proof sketch.

The idea is to reuse the construction of the proof of Proposition 14, by “killing” any process except 3 by sending them to “sink” locations. See Section A.2.

5.2 Parameterized reachability-emptiness with invariants

Let us now consider the parametrised reachability-emptiness problem in PDTNs. In the absence of invariants, the 2CM encoding used in the previous proofs would become incorrect for a parametric number of processes: recall that we avoided the use of invariants by letting the system get stuck if a transition is not taken at the “right” time. However, in a system with a parametric number of processes, a single process that gets stuck will not cause the whole computation to get stuck, since another process may have taken the transition at the “right” time. Moreover, a process that gets stuck will ruin the synchronization that guarantees simulation of the 2CM, since now taking a transition with location guard [qit] will be possible at any time after the process gets stuck in qit. We now prove that undecidability holds however with invariants.

Theorem 16.

PR-emptiness is undecidable for general PDTNs, even with a single clock and a single parameter (with invariants).

Proof sketch.

We rely on the construction given in the proof of Proposition 13, and we show that any additional processes will just simulate one of the existing three processes, due to the presence of invariants. Most importantly, no process can remain “idle” in a location forever, and therefore the location guards still guarantee that the 2CM is simulated correctly. See Section A.3.

5.3 Parameterized global reachability-emptiness

We show here that our former constructions can get rid of invariants providing we consider global properties. That is, without invariants, global properties make parametrised reachability-emptiness undecidable while it is decidable for local properties (see Section 6.3).

Theorem 17.

PGR-emptiness is undecidable for general PDTNs, even with a single clock and a single parameter, with or without invariants.

Proof sketch.

The proof technical idea is that we ask whether all processes can reach the target location qhalt, which can only be done if the 2CM was properly simulated. See Section A.4.

6 Decidability results

We will first show that, for two subclasses of PDTNs, i.e., fully parametric PDTNs with a single parameter (Section 6.1) and L/U-PDTNs (Section 6.2), deciding PR-emptiness (resp. PGR-emptiness) is equivalent to checking parametrised reachability (resp. PGR) in a non-parametric DTN – which is decidable. The third positive result, addressing one clock, arbitrarily many parameters and no invariants (Section 6.3), is more involved and requires different techniques.

6.1 Fully parametric PDTNs with a single parameter

Theorem 18.

PR-emptiness (resp. PGR-emptiness) for fully parametric PDTNs with 1 parameter and arbitrarily many clocks is equivalent to PR (resp. PGR) for DTNs.

Proof sketch.

The idea is to test the satisfaction of the property on only two non-parametric DTNs, viz., these valuating the only parameter with 0 and 1. We show that any other non-zero valuation is equivalent (up to rescaling) to the valuation 1: indeed, without constant terms in the model (other than 0), multiplying the value of the (unique) parameter by n will only impact the value of the duration of the runs by n, but will not impact reachability. See Section B.1.

6.2 L/U-PDTNs with arbitrarily many clocks and parameters

Given d, let v0/d denote the valuation such that for all pL, v(p)=0 and for all pU, v(p)=d. We will consider the special valuation v0/: strictly speaking, v0/ is not a proper parameter valuation due to , but valuating a PTA with v0/ consists in removing the inequalities involving upper-bound parameters with a positive coefficient.

Theorem 19.

PR-emptiness (resp. PGR-emptiness) for L/U-PDTNs is equivalent to PR (resp. PGR) for DTNs.

Proof sketch.

We first show that networks of L/U-gPTAs are monotonic: that is, given 𝒜 an L/U-gPTA and v a parameter valuation, any computation of (v(𝒜))n is a computation of (v(𝒜))n, for all v such that upper-bound parameters are larger than or equal to their value in v and lower-bound parameters are smaller than or equal to their value in v. We then show that, given φ a global reachability property over 𝒜, PGR-emptiness does not hold iff φ is satisfied in a configuration reachable in the DTN (v0/(𝒜)), as this DTN contains the behaviours for all parameter valuations, due to the monotonicity. Therefore, deciding PGR-emptiness for L/U-PDTNs amounts to deciding satisfaction of φ in the DTN (v0/(𝒜)); an additional technicality is necessary to show that if φ is satisfied in a configuration reachable in (v0/(𝒜)), then it is also reachable in (v(𝒜)) for some concrete (non-) parameter valuation v. See Section B.2.

Since PR and PGR can be solved in EXPSPACE and 2-EXPSPACE respectively in DTNs [13], then solving PR-emptiness and PGR-emptiness can be done with the same complexities for fully parametric PDTNs with a single parameter and for L/U-PDTNs.

6.3 PDTNs with one clock, arbitrarily many parameters and no invariants

Our last decidability result closes the gap of Section 5: while PR-emptiness for PDTNs even with a single clock and one parameter is undecidable for local properties with invariants, and is undecidable for global properties even without invariants, we show that the problem becomes decidable for local properties without invariants. This result highlights the power of invariants in PDTNs.

Theorem 20.

PR-emptiness is decidable for PDTNs with a single clock, arbitrarily many parameters, and no invariants.

Proof sketch.

We use here a completely different construction: we write a formula in the existential fragment of the first order theory of the integers with addition (a.k.a. Presburger arithmetic) enhanced with the divisibility operand (a decidable logic [28]), which will include the computation of the reachable durations of the locations used in guards in parallel to the reachability of the final location. In order to write this formula, we rely on results relating affine parametric semi-linear sets (apSl sets), a parametric extension of semi-linear sets [10, 29], to durations in a PTA. Solving PR-emptiness then boils down to deciding the truth of the formula.

This proof technique depends crucially on the parameters being integers. The formula we construct intermixes these parameters with integer variables that encode looping behaviours in the PDTN. If the parameters were allowed to take rational values, the resulting formula would fall outside the logical theories currently known to be decidable.

See [14] for our full proof.

7 Conclusion

Table 1: Decidability of PR-e and PGR-e for PDTNs ( = decidability, × = undecidability).
Clocks Parameters Invariants Local properties Global properties
1 arbitrary Without (Theorem 20) × (Theorem 17)
With × (Theorem 16) ×
arbitrary 1-param. fully-parametric Without (Theorem 18 + [12]) ? (Theorem 18)
With (Theorem 18 + [13]) ? (Theorem 18)
arbitrary L/U Without (Theorem 18 + [12]) ? (Theorem 18)
With (Theorem 18 + [13]) ? (Theorem 18)

In this paper, we investigated models with uncertainty over timing parameters, and parametrised in their number of components. We showed that the emptiness of the parameter valuations set for which a given location is reachable for some number of processes is decidable for networks of gPTAs with a single clock in each process and arbitrarily many parameters, provided no invariants are used, and for local properties only; this positive result is tight, in the sense that adding invariants or considering global properties makes this problem undecidable. We additionally exhibited two further decidable subclasses, by restricting the use of the parameters, without restriction of the number of clocks and parameters. We summarize our results in Table 1. Beside emphasizing the strong power of invariants and global properties, our results show an interesting fact on the expressive power of the communication model: while reachability is decidable for PTAs with 1 or 2 clocks and one parameter [8, 16, 26], it becomes undecidable in our setting with a single parameter.

Perspectives.

First, it can be easily shown that our negative results from Section 5 all hold as well over discrete time. Second, our undecidability results are expressed so far over integer-valued parameters. While the undecidability of integer-valued parameters implies undecidability for rational-valued parameters, the case of bounded rational-valued parameters (e.g., in a closed interval) remains open; we conjecture it remains undecidable using a different encoding of our undecidability proofs. However, we have no hint regarding the extension of our decidable results (notably Theorem 20), as our proof techniques heavily rely on the parameter integerness. Also, whether extending the decidable case of Theorem 20 to two clocks preserves decidability remains open too.

An interesting future work is the question of parameter synthesis (for the decidable cases). That is, beyond deciding the emptiness of the valuations set for which some properties hold, can we synthesize them?

Finally, considering universal properties is an interesting perspective: this can include the existence of a parameter valuation for which all numbers of processes satisfy a property or, conversely, the fact that all parameter valuations are such that some number of processes (or all processes) satisfy a property.

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Appendix A Proofs of Section 5

A.1 Proof of Proposition 14

Proposition 14. [Restated, see original statement.]

Assume a gPTA 𝒜 with a single clock and a single parameter, and one of its locations. Deciding the emptiness of the set of timing parameter valuations v for which is reachable in the NTA v(𝒜)3 is undecidable, even without invariants, for all such 𝒜.

Proof.

Let us show that the absence of invariants in the proof of Proposition 13 does not harm the encoding of the 2CM. The overall idea is that, if a process “chooses” to not take some outgoing transition in the absence of invariants, then we show that the whole computation is stuck, and qhalt is unreachable. Put it differently, while the absence of invariants may add some runs, none of these runs can reach qhalt, and the final correctness argument of the proof of Proposition 14 still holds.

In the initial gadget in Figure 2(e), if the process encoding x1 (resp. x2) fails in taking the transition from 0t to 11 (resp. from 0t to 12) after exactly p time units, then the first process encoding t is stuck forever in 1t, and qhalt is unreachable.

Now, consider the subpart encoding the clock t (in all gadgets): in the absence of invariants, no transition is forced to be taken. However, since all outgoing transitions from the qit locations are guarded by t=0, staying more than 0 time unit blocks this process forever, and qhalt becomes unreachable. The same applies to intermediate locations, which all have tight guards (e.g., t=p). Therefore, to reach qhalt, then the process encoding clock t must take all its guards at the appropriate time – which we assume from now on.

Then, consider the two subparts encoding clocks x1 and x2. For the same reason, failing in taking a transition will block the process forever and, due to the final gadget in Figure 2(f) ensuring transitions are guarded by x=0, will block the first process, and therefore qhalt will be unreachable.

This concludes the proof.

A.2 Proof of Proposition 15

Proposition 15. [Restated, see original statement.]

Let 𝒜 be a gPTA, and one of its locations. For any n3, deciding the emptiness of the set of timing parameter valuations v for which is reachable in the NTA v(𝒜)n is undecidable, even when 𝒜 contains a single clock and a single parameter without invariants.

Proof.

The idea is to reuse the construction of the proof of Proposition 14, by “killing” any process except 3 by sending them to “sink” locations, from which they cannot interfere with the encoding of the 2-counter machine. Fix n>3. The modified initial gadget is given in Figure 5. The first three processes behave as in Figure 2(e). Then, all remaining processes are sent to “sink” locations (s3 to sn1); for one process i to reach its sink location si, its predecessor i1 must have reached its own sink location si1, due to the location guard “[si1]”. Finally note that the first process (simulating t) must make sure that the last process has reached its sink location (location guard “[sn1]”) before reaching the starting location q0t. This ensures that all processes i>3 are in sink locations, where they cannot interfere with the encoding.

Figure 5: Modified initial gadget for exactly n processes.

The rest of the proof then follows the reasoning of the proof of Proposition 14.

A.3 Proof of Theorem 16

Theorem 16. [Restated, see original statement.]

PR-emptiness is undecidable for general PDTNs, even with a single clock and a single parameter (with invariants).

Proof.

First note that, in order to traverse the gadgets from the proof of Proposition 13, one needs (at least) 3 processes, due to the interdependency between the location guards. We will show that any process beyond the 3 required processes can only “mimic” the behaviour of one of the 3 required processes.

Consider a process beyond the first three processes. In the initial gadget (Figure 2(e)), it can “choose” any of the three branches leading to the three subparts, as the first three processes make them all available.

First assume this extra process follows the first subpart, simulating clock t: observe that, in all the gadgets of the first subpart (Figures 2(b), 3(b), and 4(b)), the behaviour is almost completely deterministic (e.g., all locations with invariant “tp” are followed by a transition guarded by “t=p”). The only exception is in the branching to either it or kt in Figure 4(b); assuming exactly one of the location guards [i11] or [k1] holds (which we discuss below), then this aforementioned extra process will follow exactly the behaviour of the first process.

Alternatively, assume that this extra process follows the second subpart (simulating x1) and let us show that it will follow the second process (the third subpart is similar). In most locations of our gadgets (Figures 2(c), 3(c), and 4(c)), the outgoing guards are tight w.r.t. the invariant (e.g., invariant “x1p+1” followed by a transition guarded by “x1=p+1”), and this extra process is forced to follow the second process. In the remaining locations followed by non-tight guards (e.g., “x1p” in the increment gadget in Figure 3(c)), the guard is always additionally guarded by the location guard [qjt], which makes its behaviour deterministic since the processes simulating clock t are deterministic. Therefore, this extra process is again forced to follow the second process. The 0-test and decrement gadget is similar, with one additional crucial observation: since the aforementioned extra process mimicked the second process so far, then in qi1, due to the location guard [qit] ensuring a transition in 0-time, then either x1=0 or x1>0 holds, and therefore either both processes simulating x1 reach i11, or both of them reach k1 – which justifies the assumption made earlier.

For these reasons, qhalt is reachable only if the first three processes correctly simulate the 2CM; since any additional processes will just simulate one of the first three processes, we can just apply the correctness argument from the proof of Proposition 13.

A.4 Proof of Theorem 17

Theorem 17. [Restated, see original statement.]

PGR-emptiness is undecidable for general PDTNs, even with a single clock and a single parameter, with or without invariants.

Proof.

We prove the result without invariants. (The case with invariants is simpler and follows immediately.)

The idea is that we ask whether all processes can reach the target location qhalt, which can only be done if the 2CM was properly simulated. First note that asking whether all processes can reach the target location qhalt is a property satisfying the definition of global property in Section 4, by simply checking that the number of all locations but qhalt is exactly 0 (called “target problem”).

As in the proof of Theorem 16, in order to traverse the gadgets from the proof of Proposition 13, one needs (at least) 3 processes, due to the interdependency between the location guards. We show here that any process beyond the 3 required processes can only “mimic” the behaviour of one of the 3 required processes, or block the system due to a timelock if it fails to correctly mimic it.

First note that if any of the first three processes does not correctly encode the 2CM (which is a possibility due to the absence of invariants), then an outgoing guard will not be firable, and therefore this process will be blocked forever in its current location, and the global property that all processes must reach qhalt cannot hold. So we assume that the first three processes correctly encode the 2CM (w.l.o.g. we assume that process i encodes the i-th subpart).

Now consider a process beyond the first three processes. In the initial gadget (Figure 2(e)), it can “choose” any of the three branches leading to the three subparts, as the first three processes make them all available. Due to the absence of invariants, the process can also choose to not pass the initial gadget – but failing to take such a guard will block it forever in a location due to the guards x=0, and the global property that all processes must reach qhalt will never hold.

First assume this extra process follows the first subpart, simulating clock t: just as in the proof of Theorem 16, because in all the gadgets of the first subpart (Figures 2(b), 3(b), and 4(b)), the guards are always punctual (i.e., involve equalities), then this extra process will either follow exactly the behaviour of the first process, or fail in taking some guard – therefore remaining forever in its location and violating the global reachability property.

Alternatively, assume that this extra process follows the second subpart (simulating x1). As in the former reasoning, either that extra process will exactly mimic the behaviour of the second process, or will fail in taking some guard, and therefore being blocked in its location, thus violating again the global reachability property.

The case of the final gadget is similar: if any of the processes arrive too early or too late, they will be blocked due to the urgent guards (of the form x=0 together with the location guards), and the global reachability will be violated.

For these reasons, qhalt is reachable only if the first three processes correctly simulate the 2CM and if all additional processes simulate exactly one of the first three processes. Finally, we can again apply the correctness argument from the proof of Proposition 14.

Appendix B Proofs of Section 6

B.1 Proof of Theorem 18

Theorem 18. [Restated, see original statement.]

PR-emptiness (resp. PGR-emptiness) for fully parametric PDTNs with 1 parameter and arbitrarily many clocks is equivalent to PR (resp. PGR) for DTNs.

Proof.

Let 𝒜 be a fully parametric gPTA with 1 parameter p. 𝒜 is therefore a fully parametric PDTN. Let v0 and v1 denote the valuations such that v0(p)=0 and v1(p)=1, a concept reused from the proof of [27, Corollary 4.8].

We prove the result for global reachability properties (PGR-emptiness), as local properties are a subcase. Fix a global property φ. Let us show that PGR-emptiness does not hold iff φ is satisfied in a configuration reachable in (v0(𝒜)) or in (v1(𝒜)).

The following lemma derives easily from [27, Proposition 4.7], adapted to the semantics of NTAs (Section 3), and comes from the fact that, whenever no constant terms are used in a gPTA, then rescaling the parameter valuation does not impact the satisfaction of reachability properties.

Lemma 21 (Multiplication of constants).

Let 𝒜 be a fully parametric gPTA with a single parameter p. Fix n. Let φ be a global property. Then for all parameter valuations v, a configuration 𝔠 with 𝔠φ is reachable in (v(𝒜))n iff t>0 such that t×v(p), a configuration 𝔠 with 𝔠φ is reachable in ((t×v)(𝒜))n, where t×v denotes the valuation such that (t×v)(p)=t×(v(p)).

We can now proceed to the proof of Theorem 18.

Assume PGR-emptiness does not hold for 𝒜, i.e., there exists v such that there exists n>0 such that φ is satisfied in a reachable configuration in (v(𝒜))n. Let us show that φ is satisfiable in a configuration reachable in (v0(𝒜))n or in (v1(𝒜))n.

If v(p)=0, then the result is immediate. If v(p)0, then from Lemma 21, φ is satisfied in a configuration reachable in (v1(𝒜))n (by choosing some appropriate t, i.e., 1v(p)).

Assume φ is satisfied in a reachable configuration in (v0(𝒜)) or in (v1(𝒜)). That is, there exists n>0 such that there is a computation π of (v0(𝒜))n or of (v1(𝒜))n reaching a configuration 𝔠 s.t. 𝔠φ. Therefore PGR-emptiness does not hold.

Therefore, it suffices to test the satisfaction of φ in (v0(𝒜)) and (v1(𝒜)).

Finally, the hardness argument is immediate, considering a PDTN without parameter, and replacing constants different from 1 with additional clocks and locations.

B.2 Proof of Theorem 19

Recall that =LU. Given v,v, we write vv whenever pL,v(p)v(p) and pU,v(p)v(p).

Lemma 22 (Monotonicity).

Let 𝒜 be an L/U-gPTA. Let v be a parameter valuation. For any v such that vv, for any n>0, any computation of (v(𝒜))n is a computation of (v(𝒜))n.

Proof.

From the fact that any valuation vv will only add behaviours due to the enlarged guards.

Theorem 19. [Restated, see original statement.]

PR-emptiness (resp. PGR-emptiness) for L/U-PDTNs is equivalent to PR (resp. PGR) for DTNs.

Proof.

We prove the result for global reachability properties (PGR-emptiness), as local properties are a subcase. Let 𝒜 be an L/U-gPTA and φ a global reachability property over 𝒜. 𝒜 is therefore an L/U-PDTN. Consider the DTN (v0/(𝒜)). Let us show that PGR-emptiness does not hold iff φ is satisfied in a configuration reachable in (v0/(𝒜)).

Assume PR-emptiness does not hold for 𝒜, i.e., there exists v such that there exists n>0 such that φ is satisfied in (v(𝒜))n. That is, there exists a computation π of (v(𝒜))n reaching a configuration 𝔠 such that 𝔠φ. From Lemma 22, π is a computation of (v(𝒜))n, for any vv. And by extension, completely removing the upper-bound guards (i.e., valuating upper-bound parameters with ) only adds behaviour, and therefore π is a computation of (v0/(𝒜))n. Hence 𝔠 is reachable in (v0/(𝒜)), and hence φ is satisfied.

Assume there exists a configuration 𝔠 reachable in (v0/(𝒜)) such that 𝔠φ. That is, there exists n>0 such that there is a computation π of (v0/(𝒜))n reaching a configuration 𝔠 s.t. 𝔠φ. Now, v0/ is not a proper parameter valuation, so we need to exhibit a parameter valuation assigning to each parameter an integer value. We reuse the same concrete parameter valuation for upper-bound parameters as exhibited in [27, Proposition 4.4]: let T be the smallest constant occurring in the L/U-gPTA 𝒜, and let T be the maximum clock valuation along π. Fix D=T+|T|+1. (We add T to compensate for potentially negative constant terms “d” in guards and invariants of 𝒜.) Since the maximum clock valuation along π is T, any guard of the form x1iMαi×pi+d, that was replaced with x< in (v0/(𝒜))n, can be equivalently replaced with x1iMαi×D+d without harming the satisfaction of the guard. Therefore, 𝔠 is reachable in (v0/D(𝒜))n, and hence in (v0/D(𝒜)). Therefore, since 𝔠φ, PGR-emptiness does not hold.

Therefore, deciding PGR-emptiness for L/U-PDTNs amounts to deciding satisfaction of φ in the DTN (v0/D(𝒜)).

The case of local properties follows a similar reasoning.