Abstract 1 Introduction 2 Revisiting ETH hardness for 𝗠𝗖𝗦𝗣 via Simple Extensions 3 The Structure of Optimal 𝗫𝗢𝗥 Circuits 4 A Fixed-Parameter Tractable Simple Extension Solver References

Simple Circuit Extensions for XOR in PTIME

Marco Carmosino ORCID MIT-IBM Watson AI Lab, Cambridge, MA, USA Ngu Dang ORCID Boston University, MA, USA Tim Jackman ORCID Boston University, MA, USA
Abstract

The Minimum Circuit Size Problem for Partial Functions (𝖬𝖢𝖲𝖯) is hard assuming the Exponential Time Hypothesis (ETH) (Ilango, 2020). This breakthrough result leveraged a characterization of the optimal {,,¬} circuits for n-bit 𝖮𝖱 (𝖮𝖱n) and a reduction from the partial f-Simple Extension Problem where f=𝖮𝖱n. It remains open to extend that reduction to show ETH-hardness of total 𝖬𝖢𝖲𝖯. However, Ilango observed that the total f-Simple Extension Problem is easy whenever f is computed by read-once formulas (like 𝖮𝖱n). Therefore, extending Ilango’s proof to total 𝖬𝖢𝖲𝖯 would require replacing 𝖮𝖱n with a more complex but similarly well-understood Boolean function.

This work shows that the f-Simple Extension problem remains easy when f is the next natural candidate: 𝖷𝖮𝖱n. We first develop a fixed-parameter tractable algorithm for the f-Simple Extension Problem that is efficient whenever the optimal circuits for f are (1) linear in size, (2) polynomially “few” and efficiently enumerable in the truth-table size (up to isomorphism and permutation of inputs), and (3) all have constant bounded fan-out. 𝖷𝖮𝖱n satisfies all three of these conditions. When ¬ gates count towards circuit size, optimal 𝖷𝖮𝖱n circuits are binary trees of n1 subcircuits computing (¬)𝖷𝖮𝖱2 (Kombarov, 2011). We extend this characterization when ¬ gates do not contribute the circuit size. Thus, the 𝖷𝖮𝖱-Simple Extension Problem is in polynomial time under both measures of circuit complexity.

We conclude by discussing conjectures about the complexity of the f-Simple Extension problem for each explicit function f with known and unrestricted circuit lower bounds over the DeMorgan basis. Examining the conditions under which our Simple Extension Solver is efficient, we argue that multiplexer functions (𝖬𝖴𝖷) are the most promising candidate for ETH-hardness of a Simple Extension Problem, towards proving ETH-hardness of total 𝖬𝖢𝖲𝖯.

Keywords and phrases:
Minimum Circuit Size Problem, Circuit Lower Bounds, Exponential Time Hypothesis
Copyright and License:
[Uncaptioned image] © Marco Carmosino, Ngu Dang, and Tim Jackman; licensed under Creative Commons License CC-BY 4.0
2012 ACM Subject Classification:
Theory of computation Circuit complexity
; Theory of computation Fixed parameter tractability
Related Version:
Full Version: https://arxiv.org/abs/2511.16903 [5]
Acknowledgements:
We would like to thank Rahul Ilango for many invaluable discussions.
Editors:
Meena Mahajan, Florin Manea, Annabelle McIver, and Nguyễn Kim Thắng

1 Introduction

Circuits model the computation of Boolean functions on fixed input lengths by acyclic wires between atomic processing units – logical “gates.” To measure the circuit complexity of a function f, we first fix a set of gates – called a basis. This work studies circuits over the following basis: fan-in 2 AND, fan-in 2 OR, and fan-in 1 NOT gates. We consider two complexity size measures μ𝒟 and μ, which count only the binary gates and the total number of gates in a circuit respectively. We will refer to equipped with these two complexity measures as 𝒟, the DeMorgan basis, and , the Red’kin basis respectively.111We will specify a basis if a statement pertains to only that basis. If the basis is not specified, then the statement applies to both 𝒟 and .

Basic questions about these models have been open for decades; we cannot even rule out the possibility that every problem in 𝖭𝖯 is decided by a sequence of linear-size circuits (see page 564 of [23]). Despite this, the ongoing search for circuit complexity lower bounds has fostered rich and surprising connections between cryptography, learning theory, and algorithm design [14, 10, 40, 6, 38, 16]. The Minimum Circuit Size Problem (𝖬𝖢𝖲𝖯, [24]) appears in all of these areas, asking:

Given an n-input Boolean function f as a 2n-bit truth table, what is the minimum s such that a circuit of size s computes f ?

The existential question – do functions that require “many” gates exist? – was solved in 1949: Shannon proved that almost all Boolean functions require circuits of near-trivial222From using a lookup table. size Ω(2nn) by a simple counting argument [43]. The current best answer to the explicit question in the DeMorgan basis – is such a hard function in 𝖭𝖯? – is a circuit lower bound of 5no(n), proved via gate elimination [22]. This is far from the popular conjecture that 𝖭𝖯-complete problems require super-polynomial circuit size.

The algorithmic question – is 𝖬𝖢𝖲𝖯 𝖭𝖯-hard? – remains open after nearly fifty years, despite substantial effort [44]. Under standard cryptographic conjectures (i.e., if efficient and strong pseudorandom generators exist) 𝖬𝖢𝖲𝖯 is not in 𝖯 [24]. But 𝖭𝖯-hardness seems beyond current techniques: the existence of a “standard” reduction from 𝖲𝖠𝖳 to 𝖬𝖢𝖲𝖯 is often enough to imply breakthrough complexity separations or unlikely collapses [24, 15]. For instance, a polynomial time many-one reduction from 𝖲𝖠𝖳 to 𝖬𝖢𝖲𝖯 would separate 𝖤𝖷𝖯 from 𝖹𝖯𝖯 [34]. To sidestep these barriers, one can try specializing 𝖬𝖢𝖲𝖯 to natural variants. This approach has been fruitful: 𝖣𝖭𝖥-𝖬𝖢𝖲𝖯, 𝖬𝖢𝖲𝖯 for 𝖮𝖱- and -𝖬𝖮𝖣 circuits, and 𝖬𝖢𝖲𝖯 for multi-output functions are all known to be 𝖭𝖯-hard [32, 13, 21]. Alternately, working under a stronger assumption like the Exponential Time Hypothesis (ETH) can avoid barriers by allowing for super-polynomial time (non-standard) reductions. Indeed, 𝖬𝖢𝖲𝖯 for partial functions (𝖬𝖢𝖲𝖯) is ETH-hard under deterministic reductions [19].333𝖬𝖢𝖲𝖯 was later proven to be 𝖭𝖯-hard under randomized reductions in [12]. We explain why a similar proof is difficult to generalize for 𝖬𝖢𝖲𝖯 in Section 1.2. Furthermore, there is formal evidence that proving the correctness of a reduction from 𝖲𝖠𝖳 to 𝖬𝖢𝖲𝖯 requires non-relativizing techniques [39]. In Section 1.2, we explain why proving ETH-hardness of 𝖬𝖢𝖲𝖯 seems much more approachable than proving 𝖭𝖯-hardness.

Accordingly, this work investigates the feasibility of generalizing Ilango’s technique for ETH-hardness of 𝖬𝖢𝖲𝖯 to 𝖬𝖢𝖲𝖯, whose hardness under ETH remains wide-open and of substantial interest. Underlying Ilango’s proof is a decision problem about circuit complexity of Boolean simple extensions which we call the f-Simple Extension Problem (f-𝖲𝖤𝖯).

Definition (Simple Extension).

Let f be a Boolean function that depends on all of its n variables. A simple extension of f is either f itself or a function g on n+m variables satisfying:

  1. 1.

    g depends on all of its inputs.

  2. 2.

    CC(g) – the circuit-size complexity of g – is CC(f)+m.

  3. 3.

    There exists a setting k{0,1}m, a key, such that for all x{0,1}n, g(x,k)=f(x).

We define the f-Simple Extension decision problem for total functions below.444For partial function f-Simple Extension (f-𝖲𝖤𝖯), g is a partial function and we must determine whether any completion of g is a simple extension of f.

Problem (The f-Simple Extension Problem).

Let f be a sequence of Boolean functions {fn}n such that each fn depends on all of its n inputs. The f-Simple Extension Problem is defined as follows: Given n and tt(g) – the truth table of a binary function g – decide whether g is a simple extension of fn.

For a fixed f whose truth tables can be efficiently computed and whose exact circuit complexity is known, f-𝖲𝖤𝖯 reduces to a single call to an 𝖬𝖢𝖲𝖯 oracle, because checking whether g is a non-degenerate extension of f can be done in polynomial time via brute force (given the truth table of g). This observation gives rise to an 𝖬𝖢𝖲𝖯-hardness proof framework: if one can identify an explicit function family f for which deciding the f-Simple Extension Problem is hard, then 𝖬𝖢𝖲𝖯 is also hard.

This framework was used in Ilango’s hardness proof for 𝖬𝖢𝖲𝖯 [19], i.e. hardness is shown by reducing an ETH-hard problem to deciding whether a partial function is a simple extension of f=𝖮𝖱. Can one extend this idea to total 𝖬𝖢𝖲𝖯 and prove 𝖬𝖢𝖲𝖯𝖯 under ETH? Keeping f=𝖮𝖱, the answer is no: optimal circuits for 𝖮𝖱 are so well-structured that deciding whether a total function is a simple extension of 𝖮𝖱 is actually easy; see the discussion in Section 1.2.2 of [19]. Briefly, minimal 𝖮𝖱 circuits are read-once formulas: every input is read exactly once and each internal gate must compute 𝖮𝖱2 and have fan-out 1. Simple extensions of 𝖮𝖱 will also be computed by read-once formulas, and deciding whether a given Boolean function has a read-once formula is easy [2, 11].

Could replacing 𝖮𝖱 with some read-many f allow Ilango’s technique to prove 𝖬𝖢𝖲𝖯 is ETH-hard? In Section 2, we revisit Ilango’s proof and make explicit the role of f-Simple Extension Problem in the ETH-hardness of 𝖬𝖢𝖲𝖯. We find that the proof relies on a deep understanding of the base function’s optimal circuits beyond tight size bounds. Therefore,

“the missing component in extending our results to 𝖬𝖢𝖲𝖯 is finding some function f whose optimal circuits we can characterize but are also sufficiently complex.”
– Rahul Ilango, SIAM J. of Computing, 2022

We show that 𝖷𝖮𝖱, one of a few read-many functions whose circuits are fully characterized, cannot be used to show ETH-hardness for 𝖬𝖢𝖲𝖯. For other candidate functions, it is more ambiguous. We discuss prospects for alternative hard functions in Section 1.3.

1.1 Our Results and Contributions

We narrow the field of candidate functions for such a hardness proof by developing a fixed-parameter tractable algorithm for the f-Simple Extension problem (Section 4). Such an algorithm is surprising, because f-Simple Extension is a meta-complexity problem about general circuits and our algorithm works in regimes where we know explicit circuit lower bounds. Often, the combinatorial facts used in lower bounds imply a hardness result for the appropriately-restricted meta-complexity problem! Nonetheless, we obtain:

Main Result.

The f-Simple Extension Problem is in 𝖯 whenever

  1. 1.

    CC(f) – the circuit-size complexity of f – is linear,

  2. 2.

    the maximum fan-out over all optimal circuits for f is constant, and

  3. 3.

    the optimal555In 𝒟, we require a circuit to be normalized for it to be optimal. In particular, it cannot contain any double-negations. This prevents every function from having an infinite number of optimal circuits.circuits for f, up to isomorphism and permutation of its n inputs, are efficiently enumerable and polynomial few with respect to the length of its truth table: 2n.

To apply our main result and discount a particular f, we require an exact specification of its optimal circuits. The next natural candidate – 𝖷𝖮𝖱, a simple function whose circuits are neither read-once nor monotone – has been well studied. Beyond enjoying exact size bounds [42, 37], 𝖷𝖮𝖱 is one of the few functions whose structure has been studied; it is known that, in , all optimal 𝖷𝖮𝖱n circuits are binary trees of n1 sub-blocks that compute 𝖷𝖮𝖱2 [26]. We extend this structural analysis to 𝒟, obtaining

Main Lemma ([26], Lemma 6).

Optimal 𝖷𝖮𝖱n circuits are binary trees of (n1) sub-circuits that compute (¬)𝖷𝖮𝖱2, in both the Red’kin and DeMorgan bases.

Each 𝖷𝖮𝖱n circuit can therefore be characterized using binary trees with n leaves, of which there are Cn1=O(2n), where Cn is the nth Catalan number [45]. As there are a finite number of optimal normalized (¬)𝖷𝖮𝖱2 circuits, combining this characterization and our main result immediately yields

Main Corollary.

The 𝖷𝖮𝖱-Simple Extension Problem is in 𝖯.

Applying Ilango’s technique to 𝖬𝖢𝖲𝖯 will require a deeper study of circuit minimization. This is not merely because any hardness proof needs to bypass our algorithm; knowledge of circuit lower-bounds and optimal constructions for the base function is intrinsic to the reduction itself. We make this connection explicit in Section 2, identifying that

Main Observation.

f-𝖲𝖤𝖯 is ETH-hard under Levin reductions.

That is, the reduction efficiently maps back and forth between yes instance witnesses and the set of highly structured optimal circuits which compute the Boolean functions output by the reduction. On the other hand, the reduction yields non-trivial circuit lower-bounds for those truth tables output by no instances.

Finally, in Section 1.3, we inspect each explicit function h that enjoys DeMorgan circuit lower bounds and argue how plausible it is that the optimal set of h-circuits avoids our Main Result – a roadmap towards ETH-hardness of total 𝖬𝖢𝖲𝖯 via h-𝖲𝖤𝖯. All proofs are deferred to the full version due to page limits [5].

1.2 Related Work

Proving ETH-hardness of 𝖬𝖢𝖲𝖯 seems much more approachable than proving 𝖭𝖯-hardness: to the best of our knowledge, all known barriers to proving 𝖭𝖯-hardness of 𝖬𝖢𝖲𝖯 do not apply to proving ETH-hardness of 𝖬𝖢𝖲𝖯. We survey this work on barriers (which motivates our focus on ETH-hardness) and then cover related work on optimal circuit design.

Barriers to NP-hardness of 𝗠𝗖𝗦𝗣 From Breakthrough Consequences.

Resolving the 𝖭𝖯-hardness of 𝖬𝖢𝖲𝖯 using standard reductions implies breakthrough complexity lower bounds that, while believed to be true, seem far beyond current techniques. Kabanets and Cai showed that a “natural” reduction from 𝖲𝖠𝖳 to 𝖬𝖢𝖲𝖯 can be used to construct functions in 𝖤 with super-polynomial circuit complexity [24]. Natural reductions suffice for nearly all known 𝖭𝖯-hardness results; they generalize textbook-style gadget reductions. Later, Murray and Williams showed that a polynomial-time many-one reduction from 𝖲𝖠𝖳 to 𝖬𝖢𝖲𝖯 implies 𝖤𝖷𝖯𝖹𝖯𝖯 [34]. These types of barriers use the efficiency and/or structure of an assumed reduction R from 𝖲𝖠𝖳 to 𝖬𝖢𝖲𝖯 to bound the circuit complexity of truth tables printed by R and obtain dramatic consequences.

We can avoid these barriers by aiming instead for ETH-hardness of 𝖬𝖢𝖲𝖯, because hardness proofs under the Exponential Time Hypothesis allow for super-polynomial time reductions. Supposing that 𝖬𝖢𝖲𝖯 is ETH-hard under a reduction R gives only a sub-exponential time bound on R, which may well be super-polynomial. Inspecting the arguments of Kabanets and Cai, natural super-polynomial time reductions from 𝖲𝖠𝖳 to 𝖬𝖢𝖲𝖯 imply only linear circuit lower bounds – which are known via gate elimination! Similarly, a key step in Murray and Williams’ argument fails when the many-one reduction requires super-polynomial time. Thus, [24, 34] and similar barriers do not apply to proving ETH-hardness of 𝖬𝖢𝖲𝖯 by reducing an ETH-hard problem to f-Simple Extension.

Relativization-Like Barriers to NP-hardness of 𝗠𝗖𝗦𝗣.

More barriers to 𝖭𝖯-hardness of 𝖬𝖢𝖲𝖯 were established by considering either the reduction, the 𝖬𝖢𝖲𝖯 problem, or both relative to an oracle. For example, oracle-independent reductions work for 𝖬𝖢𝖲𝖯A for every oracle A; often they use 𝖬𝖢𝖲𝖯 only to distinguish between “high” and “low” complexity functions and arise in arguments about pseudorandomness. Hirahara and Watanabe showed that if 𝖬𝖢𝖲𝖯 is 𝖭𝖯-hard under efficient deterministic oracle-independent reductions, then 𝖯=𝖭𝖯 – so it is natural to conjecture that such reductions are impossible [15]. Later, Ren and Santhanam showed that the complexity of 𝖬𝖢𝖲𝖯 is not robust in relativized worlds [39]. This suggests that non-relativizing techniques will be required to prove the correctness of a reduction from 𝖲𝖠𝖳 to 𝖬𝖢𝖲𝖯.

We conjecture that aiming for ETH-hardness of 𝖬𝖢𝖲𝖯 via f-Simple Extension avoids these barriers by combining gate elimination with the circuit complexity of a specific and explicit function: f. Ren and Santhanam comment that it remains unclear whether relativization is a barrier to the techniques in some recent work in meta-complexity that used gate elimination and related ideas [17, 18, 19, 21] (see Section 1, pg. 2 of [39]). Indeed, many gate elimination arguments prove non-relativizing statements. For example, relativizing DeMorgan circuits to 𝖷𝖮𝖱2 falsifies the lower bounds on 𝖷𝖮𝖱. Furthermore, the characterization of a function’s optimal circuits seems unlikely to be robust to the addition of oracle gates – avoiding oracle-independence.

NP-Hardness of 𝗠𝗖𝗦𝗣.

A breakthrough result of Hirahara shows that Partial 𝖬𝖢𝖲𝖯 is unconditionally 𝖭𝖯-hard under randomized reductions [12]. Extending this result could yield 𝖭𝖯-hardness of total-function 𝖬𝖢𝖲𝖯. However, that approach faces a version of the oracle-independence barrier: Hirahara’s reduction is in fact many-one and oracle-independent! If there is a many-one oracle-independent randomized reduction from 𝖲𝖠𝖳 to 𝖬𝖢𝖲𝖯, then the polynomial hierarchy (𝖯𝖧) collapses [15]. Because 𝖯𝖧 is widely conjectured to be infinite and strict, it seems that significantly new ideas would be required to extend Hirahara’s argument about 𝖬𝖢𝖲𝖯 to show 𝖭𝖯-hardness of total 𝖬𝖢𝖲𝖯.

Optimal Circuit Design.

Knowing the lower-bounds of some explicit Boolean functions f, a natural question to ask is: What about the structure of every optimal circuit computing f? For some functions and bases, this is easy to answer: minimal Red’kin circuits for 𝖮𝖱n are binary trees of gates. For even slightly more complex functions, structural characterization seems to require intricate and exhaustive case analysis. Some of the earliest work on this question include [41] and [4] which investigated when optimal circuits for certain 2-output Boolean functions must compute each output independently. More recently, Kombarov extended the characterization of 𝖷𝖮𝖱 circuits to other complete bases when NOT-gates are counted [27].

1.3 Discussion and Future Directions

A Remark on Bases.

Both and 𝒟 are compatible with Ilango’s proof of ETH-hardness of 𝖬𝖢𝖲𝖯. That proof relied on functions whose optimal {,,¬}-circuits are read-once monotone formulas. There it was irrelevant whether ¬ gates contribute to size: those circuits simply did not contain negations. However, when we move to more complex functions like 𝖷𝖮𝖱, negations must appear in the optimal circuits and as such, we must decide how to treat them.

In the search for non-linear circuit lower bounds, the choice between μR and μD is largely irrelevant: the two complexity measures the same up to a small constant factor. However, as we discuss in Section 2, Ilango’s technique requires knowledge of the structure of optimal circuits. In this setting, there is not necessarily as strong connection between the two bases. By extending Kombarov’s characterization of 𝖷𝖮𝖱 circuits in to 𝒟, we show for that particular function, optimal circuits are structurally similar in both bases. But, for other functions, this may well not be the case. Negations could enable a function’s optimal circuits to greatly vary under the two complexity measures. Indeed, negations can greatly increase a problems complexity: [3] showed that a Boolean function learning problem became difficult only once the number of ¬ gates exceeded a small threshold.

By considering both bases in this work, we limit how negations impact the complexity of f-𝖲𝖤𝖯. We show that they do not greatly increase the complexity of the simple extensions themselves: in Section 4.1, we explain how simple extensions under both complexity measures are highly structured. If a future hardness reduction relies on negations, their role will be in increasing the structural complexity of the underlying base function, either by increasing the number of distinct optimal circuits, or by enabling non-constant fan-out in a base circuit.

A Roadmap for ETH-Hardness Proofs via Simple Extensions.

To prove f-𝖲𝖤𝖯 is ETH-hard we will need a Boolean function whose optimal circuits are more complex and/or varied than 𝖷𝖮𝖱. Specifically, these circuits must either (1) be superlinear in size, (2) require non-constant fanout, or (3) be sufficiently numerous. Superlinear bounds seem beyond current techniques – the most fruitful of which, gate elimination, seems unlikely to be able to prove lower bounds above even 11n for wide classes of functions [9]. As such, it seems more sensible to identify Boolean functions which violate the latter conditions. However, structural characterization of the optimal circuits is also hard, and seems to require very tight circuit complexity bounds. Indeed, our DeMorgan basis characterization of 𝖷𝖮𝖱 repeatedly exploited Schnorr’s exact 3(n1) bound for 𝖷𝖮𝖱n [42]. This greatly narrows the prospective class of functions from the original specification: “more complex than read-once formulas.”

However, the known explicit functions with tight DeMorgan bounds that may violate these conditions are few and far between. Table 1 summarizes these explicit functions to assess how suitable they are for ETH-hardness of f-Simple Extension Problem.666Some of listed bounds are in 𝒰2, the basis consisting of every binary Boolean function besides 𝖷𝖮𝖱2 and ¬𝖷𝖮𝖱2. For non-degenerate functions besides f(x)=¬x, 𝒰2 and 𝒟 are equivalent in terms of size. The multiplexer lower bound of [35] is for the 2, the basis of all binary Boolean functions, but it also serves as the best known lower bound in 𝒟.

Table 1: Explicit Functions with Circuit Lower Bounds in the DeMorgan Basis.
Function(s) Lower Bound Upper Bound Ω(1) Fanout Source(s)
𝖷𝖮𝖱 𝟑(𝒏𝟏) = 𝟑(𝒏𝟏) NO [42]
Sum Mod 4 4nO(1) 5nO(1) NO? [46]
Sum Mod 2k 4nO(1) 7no(n) NO? [46]
Multiplexer 2(n1) 2n+O(n) YES? [36, 25]
Well-Mixed 5no(n) 𝗉𝗈𝗅𝗒 MAYBE? [28, 22]
Weighted Sum of Parities 5no(n) 5n+o(n) YES? [1]

Observe that every function besides 𝖷𝖮𝖱 in the table has a (small) gap between the circuit lower and upper bound, and the “Ω(1) Fanout” column ends with a question mark (?). This is because 𝖷𝖮𝖱 is the only listed function for which we know the exact circuit complexity and an optimal circuit characterization. The other “Ω(1) Fanout” entries above are extrapolated by assuming that their respective DeMorgan upper bound constructions are optimal. For instance, Zwick conjectured that optimal circuits computing the Sum Mod 4 (𝖬𝖮𝖣4) function are “shaped like” ternary full-adder blocks [46]. If this conjecture is true, then 𝖬𝖮𝖣4-Simple Extension can be solved in 𝗉𝗈𝗅𝗒-time since such circuits satisfy the properties of our Main Lemma. Since the 𝖬𝖮𝖣2k functions are computed similarly, we conjecture that exactly characterizing the optimal circuits for Zwick’s functions would yield efficient Simple Extension Solvers – not a proof of ETH-hardness for total 𝖬𝖢𝖲𝖯.

However, we do have linear lower bounds for functions whose best known constructions have non-constant fanout: the multiplexing function (𝖬𝖴𝖷) contains sub-circuits which are reused a logarithmic number of times [25]. In contrast to 𝖷𝖮𝖱 however, the bounds for 𝖬𝖴𝖷 are not tight. The best lower bound is 2(n1), given by Paul [35].

Future Directions.

The most obvious next step is to either (1) obtain total characterization of the Multiplexer or (2) extend our Simple Extension Solver to handle circuits with super-constant fanout. Neither of these tasks seems easy, but also they have not been subject to intensive research the way that super-linear circuit lower bounds and hardness of 𝖬𝖢𝖲𝖯 have. We hope that connecting these kinds of results to ETH-hardness of 𝖬𝖢𝖲𝖯 provides new perspective and motivation.

Ilango’s 𝖬𝖢𝖲𝖯 result has also formed the basis for several hardness results in other models of computation such as formulas and branching programs [20, 7, 8]; could one show that the simple extension problem for formulas or branching programs is hard? These other models of computations may prove easier to work with than unrestricted circuits. They also enjoy superlinear lower bounds thereby bypassing our algorithm. Investigating the simple extension problem in these settings would provide insight into the feasibility of the approach in the circuit setting.

We conclude this section with a discussion of the simple extension problem in general. Despite having only been studied as a tool for proving hardness of 𝖬𝖢𝖲𝖯 thus far, it may be of independent interest. For example, while hardness of time-bounded Kolmogorov complexity is tightly connected to the existence of one-way functions, hardness of 𝖬𝖢𝖲𝖯 has much weaker quantitative connections [29, 38]. The f-Simple Extension Problem is more “structured” than 𝖬𝖢𝖲𝖯 and easily reduces to it, so hardness assumptions about f-Simple Extension Problem are stronger. Could such assumptions imply one-way functions?

1.4 Abstract Outline

The remainder of this abstract gives a technical overview of our results and observations.

  • Section 2 explores the implicit reduction to f-𝖲𝖤𝖯 present in the ETH-hardness proof for 𝖬𝖢𝖲𝖯 in [19]. This discussion yields our Main Observation, motivating study of f-𝖲𝖤𝖯 and optimal circuit characterization.

  • Section 3 sketches our characterization of optimal 𝖷𝖮𝖱 circuits in the DeMorgan basis.

  • Section 4 explains the ideas used by our fixed parameter tractable algorithm for f-𝖲𝖤𝖯.

All proofs are deferred to the full version due to page limits [5].

2 Revisiting ETH hardness for 𝗠𝗖𝗦𝗣 via Simple Extensions

We re-examine the proof that 𝖬𝖢𝖲𝖯 is ETH-hard from [19]. Our aim is to better understand the reduction from 2n×2n Bipartite Permutation Independent Set (𝖡𝖯𝖨𝖲) to the Partial f Simple Extension problem (f-𝖲𝖤𝖯).

2.1 The 𝒇-Simple Extension Problem

We give formal definitions of simple extensions and its associated decision problem. We first define non-degeneracy of a Boolean function.

Definition 1.

A function fn, the set of Boolean functions on n variables, depends on its ith variable, xi, if there exists an input αn such that f(α)f(αei), where ei denotes the Boolean vector that is 0 everywhere except for a 1 at index i and is bitwise 𝖷𝖮𝖱. If f depends on all of its variables, then we say f is a non-degenerate function. Conversely, we say f is a degenerate function if it does not depend on at least one variable.

We now define simple extension as

Definition 2.

Let fn be non-degenerate. A simple extension of f is either f itself or a function gn+m satisfying:

  1. 1.

    g is a non-degenerate function,

  2. 2.

    CC(g)=CC(f)+m, and

  3. 3.

    there exists a setting k{0,1}m, called a key, such that for all x{0,1}n, g(x,k)=f(x).

We denote the first n inputs of f and g by x1,xn and will refer to the extra m inputs of g as extension variables and refer to them as y1,,ym. From the definition of simple extension above, we define the following decision problem.

Problem 1 (f-𝖲𝖤𝖯).

Let f be a sequence of Boolean functions {fn}n such that each fn is a non-degenerate function in n. The f-Simple Extension Problem is defined as follows: Given n and tt(g) – the truth tables of a binary function gn+m – decide whether g is a simple extension of fn.

We extend this to partial functions,

Problem 2 (f-𝖲𝖤𝖯).

Given n and a partial tt(g), decide whether any completion of the truth table is a simple extension of fn.

2.2 An Explicit Reduction 𝗕𝗣𝗜𝗦 from to 𝒇-𝗦𝗘𝗣

Recall the formulation of 𝖡𝖯𝖨𝖲 from [19],

Problem 3 (𝖡𝖯𝖨𝖲).

The 2n×2n Bipartite Permutation Independent Set is defined as follows: Given G=(V,E) a directed graph with vertex set V=[n]×[n]. Decide whether there exists a permutation π:[2n][2n] such that:

  1. 1.

    π([n])=[n],

  2. 2.

    π({n+i:i[n]})={n+i:i[n]},

  3. 3.

    if ((j,k),(j,k))E, then either π(j)k or π(j+n)k+n

If the Exponential Time Hypothesis holds, then 𝖡𝖯𝖨𝖲 cannot be solved much faster than brute-forcing over all 2o(nlogn) permutations [30]. 𝖡𝖯𝖨𝖲 is a natural problem to show hardness of circuit size problems since there are O(2slogs) circuits of size s. Reducing from 𝖡𝖯𝖨𝖲 implies, assuming ETH, that our problem cannot be solved much faster than by brute-forcing over all possible circuits.

The reduction from 𝖡𝖯𝖨𝖲 to f-𝖲𝖤𝖯, as it appears as part of the original proof [19], is somewhat implicit; the target problem, as written, could be described more simply as “determine whether a partial truth table is ever consistent with a monotone read-once formula.” Since this is easy for total functions [2, 11], this view of the reduction cannot help us to extend the reduction technique to total 𝖬𝖢𝖲𝖯. We will need the more general f-𝖲𝖤𝖯 and by reframing Ilango’s proof we gain insight into how it might extend to total functions.

The connection to f-𝖲𝖤𝖯 is explicitly stated, however, in the introduction of [19]. Here, the reduction maps to 𝖮𝖱4n-𝖲𝖤𝖯 where each z variable is an extension variable. This is one way to frame the reduction, though non-degenerate functions computed by read-once formulas are simple extensions of any of their non-degenerate restrictions. When framing the reduction to f-𝖲𝖤𝖯 explicitly, we find it more compelling to choose a different function f^, whose truth table is given by i[2n](yizi) – because using f^ makes the intuitive description of Ilango’s technique “reverse gate elimination” an obvious property of the reduction. Under this framing, the extension variables will instead be the x variables in Ilango’s original proof. Despite this, targeting 𝖮𝖱4n-𝖲𝖤𝖯 is also natural; afterwards, we discuss how it compares to f^. Informally, the two choices of base function provide distinct “channels” for ETH to imply hardness of f-𝖲𝖤𝖯.

Structural Lemmas.

To encode 𝖡𝖯𝖨𝖲 in f^-𝖲𝖤𝖯, we first prove two lemmas which were essentially proven in tandem in [19] as Lemma 16. We separate them out here and stay faithful to the original arguments. Like Lemma 16, these lemmas establish structural properties of circuits computing our base function f^ and our eventual output g^.

Lemma 3.

Let f^:{0,1}2n×{0,1}2n{0,1} be the Boolean function computed by i[2n](yizi). If ψ be an optimal normalized777A formula is normalized if all negations are pushed down to the input level. Normalization does not affect the size of the formula, and thus f-𝖲𝖤𝖯 still reduces to 𝖬𝖢𝖲𝖯 even if we restrict ourselves to normalized formulas. formula computing f^, then ψ, as a formula, is equal to i[2n](yizi).

In particular, the only difference between two distinct optimal circuits for f^ is which binary tree of fanin 2 gates is used.

Proof.

Observe that ψ must read all of its input variables and furthermore must do so positively. This is because (1) f depends on all of its variables and is monotone in them, and (2) ψ is normalized and thus no ¬ gates can appear internally in the circuit. We note that ψ must use a total of 4n1 gates since f is non-degenerate on 4n variables computable. We see that ψ must contain at least 2n1 gates: substituting z=12n and simplifying yields a monotone read once formula computing 𝖮𝖱2n(y1,,y2n) which must consist of 2n1 gates that appear in ψ.

We now argue that each zi feeds into an gate. Assume otherwise, then observe that setting zi=1 and simplifying removes at least two gates (since z1p1p1). The resulting read once formula for f^|zi1 uses at most 4n3 gates. This is a contradiction since f^|zi1 still depends on all of its remaining 4n1 variables: it cannot be computed by a circuit with fewer than 4n2 gates.

We now argue the other input to the gate fed by zi is yi. Assume otherwise. Notice that since ψ is read-once, setting zi0 simplifying disconnects the other input to gate and thus removes dependence on any variables it depends on. However, f^|zi0 still depends on all of its variables besides yi. Thus the gate can only read yi.

Since each zi and yi feed a distinct gate, there are at least 2n gates. Since there are 4n1 total gates, and at least 2n1 gates, we know that these gates are the only gates that appear. Thus the remainder of the circuit is a binary tree of 2n1 gates whose 2n leaves are the 2n gates.

Having established the structure of optimal circuits computing f^ we can further restrict its simple extensions. Extra restrictions to the truth table enforce that extension variables must be spliced into the circuit using 2n additional gates that each read a different yi. This pairing of each yi with a different xj will define a permutation in which we can encode 𝖡𝖯𝖨𝖲 solutions.

Lemma 4.

Let g:{0,1}2n×{0,1}2n×{0,1}2n{0,1} be any simple extension of f^ satisfying the following conditions:

g(x,y,z)={f^(y,z)if x=02n𝖮𝖱2n(z1,z2n)if x=12n𝖮𝖱4n(x1,x2n,y1,y2n)if z=12n0if z=02n

If ϕ is an optimal normalized formula computing g then there exists a permutation π:[2n][2n] such that ϕ equals, as a formula, i[2n]((xπ(i)yi)zi).

Proof.

Since g(x,y,z)=f^(y,z) when x=02n, we know that ϕ must read all y and z variables positively. Similarly, all x variables must be read positively, since g(x,y,12n)=𝖮𝖱4n(x1,x2n,y1,y2n). Note that these restrictions also imply that ϕ contains exactly 4n1 gates and 2n gates since substituting and simplifying yields optimal formulas for those restrictions. From the lemma above, we know that when setting x=02n and simplifying, we obtain a circuit structurally equivalent to i[2n](yizi). Therefore 2n gates must be removed during simplification. These gates cannot feed any remaining above the gates, since otherwise setting x=12n would fix the circuit to be 1, rather than 𝖮𝖱2n(z1,z2n). Similarly, zi cannot feed any of these gates, as setting x=12n would remove dependence on that zi since the circuit is a read-once formula. Thus each gate can only depend on the x and y variables. Observe that each yi must feed into one of these gates instead of the gate fed by zi, as otherwise when we set x=12n, the function would still depend on yi. Since there are exactly 2n additional gates, and exactly 2n y and 2n x variables, its easy to see that each additional gate must read one xi and one yj. Therefore, as a formula, ϕ must be i[2n]((xπ(i)yi)zi) for some permutation π.

Table 2: 𝖡𝖯𝖨𝖲 requirements and the corresponding restrictions on g^.
𝖡𝖯𝖨𝖲 Requirement on σ Corresponding g^ Restriction Impact If π Violates
σ({1,,n})={1,,n} 𝖮𝖱n(x1,,xn) when z=1n0n and y=02n If π(i)=jn, then zj0 removes xi in Cπ
σ({n+1,,2n})={n+1,,2n} 𝖮𝖱n(xn+1,x2n) when z=0n1n and y=02n As above, Cπzj0 will not depend on xi
If ((j,k),(j,k))E then σ(j)k or σ(n+j)σ(n+k) 1 if (x,y,z)=(ek¯ek¯,02n,ejej) where ((j,k),(j,k))E Cπ wrongly outputs 0

An Explicit Reduction.

We now provide an explicit reduction from 𝖡𝖯𝖨𝖲 to f^-𝖲𝖤𝖯. Given an instance G of 𝖡𝖯𝖨𝖲 we output 4n and the partial truth-table for a function g^ that is consistent with the requirements of Lemma 4. We add three additional restrictions (listed in Table 2) to ensure that any permutation π, whose corresponding circuit Cπi[2n]((xπ(i)yi)zi) is consistent with g^, is also a solution for G (and vice versa). All other rows of the truth table are left undefined (e.g. as ). We summarize the requirements for any valid 𝖡𝖯𝖨𝖲 solution σ, the corresponding restriction, and how it enforces the requirement on π in Table 2.

This completes the reduction as any σ satisfying 𝖡𝖯𝖨𝖲 for G can be used to construct a read-once circuit consistent with g^ and vice versa. The arguments verifying this are the same as in [19], and we refer the reader there for the full details.

Lemma 5.

𝖡𝖯𝖨𝖲 reduces to f^-𝖲𝖤𝖯 in 2O(n) time.

The Original Framing.

In its introduction, [19] identifies g^ as a simple extension of 𝖮𝖱4n. Under this lens, the hardness comes from determining which 𝖮𝖱4n base circuit can have the z extension variables added. The additional truth-table restrictions on g^ force each zi to be spliced in a particular way adjacent to yi. Assuming ETH, there are Ω(n!) optimal base 𝖮𝖱4n circuits that must be checked via brute-force.

Implicit Circuit Lower Bounds & Enumeration of Optimal Circuits.

From both presentations, we see that leveraging f-𝖲𝖤𝖯 involves explicit circuit size lower bounds. Indeed, both Lemma 3 and Lemma 4 prove formula lower bounds for specific non-degenerate functions. However, in a sense, circuit lower bounds are intrinsic to the reduction itself. This connection can be made rigorous: the reduction can used to produce explicit Boolean functions which enjoy non-vacuous lower bounds. On no instance of 𝖡𝖯𝖨𝖲, the reduction outputs a partial truth table where every completion is non-degenerate but not a simple extension. Hence, the circuit complexity of these completions is not the vacuous 6n1 lower bound obtained by knowing that functions produced are non-degenerate.

Furthermore, the reduction did not solely rely on the circuit complexity of f^ and g^. Lemmas 3 and 4 tightly control how base circuits and their extensions can be arranged; and this is pivotal for encoding 𝖡𝖯𝖨𝖲 permutations. This structural requirement can be formalized by observing the reduction is also an efficient Levin reduction.

Recall, from [33], that a Levin reduction is a many-one reduction that also efficiently maps witnesses, not just problem instances. More precisely, let R be a set of ordered pairs (x,w) where x is a yes-instance of a problem and w is an accompanying certificate. We define LR, the language defined by R, to be the set of elements x such that (x,w)R for some w. Then a Levin reduction between two languages A and B is an efficient many-one reduction r between problem instances paired with two efficient mappings m, between instance-witness pairs that satisfy (1) if (x,w)RA then (r(x),m(x,w))RB and (2) (t(x),w)RB implies (x,(x,w))RA.

For 𝖡𝖯𝖨𝖲, the witnesses for an instance are simply the valid permutations σ and witnesses for f^-𝖲𝖤𝖯 are optimal circuits computing the extension. Let 𝖡𝖯𝖨𝖲 and f^-𝖲𝖤𝖯 be the sets of ordered pairs consisting of problem instances and all of their witnesses as described. The reduction admits linear time mappings between witnesses: given σ, simply construct i[2n]((xσ(i)yi)zi) and given a circuit for g^, simply read off the permutation from the x variables.

3 The Structure of Optimal 𝗫𝗢𝗥 Circuits

Similar to the characterization of optimal 𝖷𝖮𝖱 circuits over the Red’kin basis [26], we show:

Lemma 6.

Every optimal (¬)𝖷𝖮𝖱n circuit over the DeMorgan basis 𝒟 partitions into a binary tree of (n1) sub-circuits computing (¬)𝖷𝖮𝖱2 – even when NOT gates are free.

The structure of optimal circuits computing the 𝖷𝖮𝖱-function is a crucial ingredient for ruling it out as a candidate function. We carry out an elementary but intricate case analysis of restricting and eliminating gates from optimal 𝖷𝖮𝖱 circuits. Essentially we extract more information from the proof of Schnorr’s lower bound by using it to identify “templates” that must be found in any optimal 𝖷𝖮𝖱 circuit. We push this process to the limit, fully characterizing the “shape” of all such circuits. Specifically,

  • Schnorr’s proof is essentially a technical lemma which says that any one-bit restriction will eliminate at least 3 costly gates [42]. This means that at the bottom level of every optimal 𝖷𝖮𝖱 circuit, any variable must be fed into two distinct costly gates, and furthermore, one of these two must be fed into another costly gate. Any deviation from these properties will violate essential properties of the 𝖷𝖮𝖱-function, such as “𝖷𝖮𝖱 depends on all the input bits.” Via a basic inductive argument and the fact that 𝖷𝖮𝖱 is downward self-reducible, Schnorr’s lower bound follows: CC(𝖷𝖮𝖱n)3(n1).

  • Schnorr’s proof leaves the local structure of the optimal circuit computing 𝖷𝖮𝖱 “open.” Namely, it does not provide any information about the other inputs of the costly gates or where their outputs connect to the rest of the circuit, since we consider fan-in 2 and unbounded fan-out. However, we know that 𝖷𝖮𝖱 circuit has a matching upper-bound of 3(n1). In particular, this means each one-bit restriction cannot remove more than 3 gates. We also know that each variable in optimal 𝖷𝖮𝖱-circuits must be read twice.

  • We leverage these two properties to show that in every optimal 𝖷𝖮𝖱 circuit, any two distinct input variables xi and xj must be fed into a block as shown in the left sub-figure of Figure 1. Specifically, we argue that any deviations from the block will violate at least one of the properties via exhaustive case analyses of gate elimination steps. Finally, we argue that this block must compute either 𝖷𝖮𝖱2 or ¬𝖷𝖮𝖱2 and apply a basic inductive argument to obtain the desired structural characterization of any optimal circuit computing 𝖷𝖮𝖱n as depicted in the right sub-figure of Figure 1.

Besides the linear size for optimal circuits computing 𝖷𝖮𝖱, our structural theorem yields two more properties that rule out 𝖷𝖮𝖱 as a candidate function for 𝖬𝖢𝖲𝖯-hardness via Simple Extension. That is, for optimal circuits computing 𝖷𝖮𝖱n, (1) the maximum fan-out is a constant, and (2) the number of such optimal circuits up to permutation of variables, is 2O(n).

Figure 1: An example of the binary tree structure of optimal circuits computing 𝖷𝖮𝖱6. The left sub-figure depicts possible (¬)𝖷𝖮𝖱2 blocks in the Red’kin and DeMorgan Bases. Notice each optimal Red’kin circuit is an optimal DeMorgan circuit, but not vice-versa. The right sub-figure depicts that the arrangement of 𝖷𝖮𝖱2 blocks that make up 𝖷𝖮𝖱6 circuits are shared by both bases.

4 A Fixed-Parameter Tractable Simple Extension Solver

It is easy to see that the approach of solving the Simple Extension Problem for 𝖷𝖮𝖱n via brute-forcing over all possible circuits of size CC(f)+m is super-polynomial in terms of the length of the input truth-tables. Using the following ingredients, we design Algorithm 1, a Fixed-Parameter Tractable (FPT) algorithm for the Simple Extension problem that depends on the following three parameters: (1) the number of optimal circuits for f (up to isomorphism & permutation of variables), (2) the maximum fanout of any node in any optimal circuit for f, and (3) CC(f).

Algorithm 1 Informal Simple Extension Solver, taking input n,gn+m.

4.1 Structured Simple Extension Circuits

By analyzing the behavior of optimal simple extension circuits under gate elimination, we can characterize the structure of every optimal circuit computing a simple extension. By definition, if g is a simple extension of f then there are restrictions of g’s added variables (called extension variables and denoted yi) that yield f. We call such a restriction a key to f in g. We first show that circuits obtained by partially restricting with a key are themselves optimal simple extension circuits for intermediate extensions. Building on this, we then develop convenient all-stops restrictions that order substitutions and simplification steps with the following properties: (1) single-bit substitutions from this key in the given order eliminate exactly one costly gate at each step, (2) there exists such an all-stops restriction for any optimal circuit computing a simple extension.

Combining these tools, we inductively show a robust structure arises in optimal simple extension circuits: each extension variable occurs in an isolated read-once subformula that depends only on other extension variables (referred to as the Y-trees). Formally,

Definition 7 (Y-Tree Decomposition).

Let G be a circuit with two distinguished sets of inputs: base variables X and extension variables Y. A Y-Tree Decomposition of G is a set of triples γ,b,T where γ – referred to as a combiner – is a costly gate of G, bit b{0,1} designates an input of γ, and T is a sub-circuit of G rooted at the b child of γ such that

  1. 1.

    Each T is a read-once formula in only extension variables Y.

  2. 2.

    Each yiY appears in at most one T.

  3. 3.

    Each T is isolated in G – gate γ is the unique gate reading from T, and it only reads the root of T.

  4. 4.

    The sub-circuit of G rooted at the ¬b child of γ contains at least one X variable.

The size of a decomposition is the number of tuples – Y-trees and their associated combiner gates – present in the decomposition. The weight of a Y-tree decomposition is the number of extension variables that are read in some T. We say a Y-tree decomposition is total if its weight is |Y|, i.e. every extension variable appears. An example Y-tree decomposition of size three is depicted in Figure 2, where the shaded circles represent the circuity around each combiner γ connecting each T𝒴 to the rest of the circuit.

When gate elimination is performed with a total key, these added Y-trees and their combiners are pruned to reveal an embedded optimal circuit for the base f function. We get the following structural insight:

Theorem 8.

If G is a minimal circuit for a simple extension, then G has a total Y-tree decomposition.

Y-tree decomposition forms the basis of our strategy: we brute force over every optimal base circuit and try to “splice in” every possible Y-tree – literally “reversing” the process of gate elimination with a key to f in g.

Figure 2: An example of a Y-Tree Decomposition of size three.

4.2 Encoding & Decoding the “Grafts” in a Y-Tree Decomposition

To efficiently search over candidate simple extension circuits, we devise an encoding scheme and corresponding decoding algorithm which efficiently captures the difference in local neighborhoods after each new Y-tree is spliced on top of an existing gate or input. Our final encoding must be O(n+m) bits long to ensure brute-force runs in 2O(n+m). We present our encoding as a communication problem to clarify the overhead and constraints involved.

Suppose g is a simple extension of f and Alice knows G, an optimal circuit for g. Alice can obtain an optimal circuit F computing f by simply restricting the y-variables of G with a key and performing gate elimination. Now consider the following communication problem: Bob (i.e., line 5 of Algorithm 1) knows F, and Alice would like to send him G using as few bits as possible. Because g is a simple extension of f, Alice can compute the Y-tree decomposition of optimal circuit G. The idea is to send Bob a sequence of instructions that tell him exactly how to graft each Y-Tree of G onto the gates of F, where all information is encoded relative to isomorphism-invariant properties of F.

We begin by illustrating the “grafting” idea for the algorithm. First consider the case where there is only a single Y-tree T𝒴 in the decomposition of G. Then there must be some costly gate η – an origin already present in F – that is combined with T𝒴 in G. Our decomposition theorem shows that every possible arrangement of this graft is depicted in Figure 3, which shows the local neighborhood888Think of this as “zooming in” to inspect one of the shaded circles in Figure 2. of the single Y-tree in G.

(a) Before any extension variable restrictions.
(b) All extension variables restricted except yj.
Figure 3: The local neighborhood of a combiner δ and Y-tree T𝒴 grafted on an origin η.

In Figure 3, both δ and η represent costly gates that must be present, the dotted negations represent NOT gates that may be present, and the cones represent connections to the rest of G. The notation RC(β) means “the set of costly gates that read gate β in circuit C.” These sets are depicted by shaded cones, because at least one of them must be non-empty (otherwise, G would not be an optimal circuit) but we do not know which. Note how the Y-tree and potential negation atop it are isolated from the rest of the circuit, except for connections via the combiner gate δ. We will describe in some detail how this single graft can be transmitted and sketch the issues involved in efficiently coding all grafts and Y-trees for Bob.

First, Alice applies gate elimination to G to eliminate all but one of the y-variables in T𝒴. Because T𝒴 is an isolated formula in G, a single variable yj is left in G at the end of this process: the local neighborhood transforms from Figure 3(a) to Figure 3(b). Crucially, all gates outside T𝒴 are unaffected. Now, Alice runs a final step of gate elimination, substituting yj according to a key to f in g. The result will be as depicted in Figure 4: the local neighborhood of η in F. The key observation is that Bob has perfect knowledge of this structure – it is simply a sub-circuit of F. If Alice can send (1) an identifier for η (2) a “diff” between the neighborhood of η in F compared to G (Fig. 3(b) vs. 4) and (3) a description of T𝒴 this would suffice for Bob to efficiently transform F into G.

Figure 4: The origin η after the Y-tree has been pruned.

The most straightforward protocol would send O(log(#𝗀𝖺𝗍𝖾𝗌(F))) bits to identify η for Bob. This is too expensive if there is more than one Y-tree in G. Recall that we can only tolerate runtime of 2O(n+m) and intend to brute-force all possible codes. There could be as many as m Y-trees with a single variable each and thus m origins, so brute-forcing this simple code would require time 2O(mlog(n)+n) for #𝗀𝖺𝗍𝖾𝗌(F)=O(n) – super-polynomial in 2(n+m) and therefore unacceptable.

Instead, Alice can send a #𝗀𝖺𝗍𝖾𝗌(F)-bit origin indicator vector χ, where χi is 1 if gate i of F is the origin of some Y-tree. It is feasible to brute-force these vectors in 2O(n)-time for any possible number of origins given a linear upper bound on the circuit size of f. Returning to the case where G has a single Y-tree, Bob identifies η by reading the single 1-bit of χ. For the local neighborhood of η, the following information must be transmitted to summarize the “diff” between F and G:

  1. 1.

    The costly functions computed by gates η and δ,

  2. 2.

    presence or absence of each possible NOT gate depicted in Figure 3(b),

  3. 3.

    whether η is connected to the left or right input of δ,

  4. 4.

    the description of T𝒴, and

  5. 5.

    the sets of gates that read from each individual element of the graft, RG().

Items 1 - 3 can be described by a constant-length bitstring, depending only on the enumeration of all possible “graft” sub-circuits implied by our characterization of gate elimination. We code the exact Y-Tree T𝒴 (item 4) explicitly for now and eliminate it in Section 4.3. Here, we are concerned with how to efficiently code the sets RG() without sending explicit “pointers” to nodes of F, which remain too expensive per the discussion of transmitting η above.

To code these wire movements efficiently, Alice will exploit the relationship between the gates reading from η in F and the gates reading from η in G as determined by gate elimination. Bob knows the contents of RF(η) and RF(¬η) – the sets of costly gates reading from (¬)η in F. Collect the gates that read from the graft, in both G and F:

RG =RG(η)RG(¬η)RG(δ)𝖱G(¬δ)
RF =RF(η)RF(¬η)

Observe that RGRF because during the single run of gate elimination that transforms Figure 3(b) into Figure 4, all the wires reading the eliminated gate δ are “inherited” by η. Furthermore, Bob knows η from χ and thus can reconstruct RF, so Alice can identify any wire relevant to the graft by coding “the j-th element of RF.” Here we must apply the assumption that optimal circuits for f have at most constant fanout, independent of n, to bound the length of these relative wire-identifiers by a constant. Thus, Alice can identify exactly which wires should be moved from η to read (¬)δ in G. Inspecting Figure 3(b) again, she can also code where they move using constantly many bits, because there are only two options: reading from ¬δ or δ directly.

This discussion has outlined the base case of our encoding/decoding argument, where only a single Y-tree is transmitted to Bob. Notice that, if there are multiple combiner-disjoint Y-trees in G, an essentially identical strategy could encode all these Y-trees. However, reverse gate elimination can create somewhat more complex structures: specifically, we can have combiners δi grafted onto a distinct combiner δj, instead of a gate η that was present in the original circuit F. Even so, Alice can use the fact that every combiner δi has a unique origin η to identify the “first” combiner grafted onto η and instruct Bob to add subsequent η-derived combiners in depth-respecting order. See the full version for the precise statement and proofs about the grafting procedure [5].

4.3 Speeding Up Via Truth-table Isomorphism

Brute-forcing over the graft encodings described above is still catastrophically inefficient: we must eliminate the explicit description of Y-trees. Since each Y-tree is a read-once formula in the added m variables there are least Cm1m! such explicit Y-trees, where Ca is the ath Catalan number [45]. The dominating term – m! – comes from permuting the labels of the variables. The same issue arises if our base function f is symmetric: the number of optimal f circuits is Ω(n!).

We sidestep this issue and drastically improve the speed of brute-force search. If we “incorrectly” assign variables in the base circuit or in the Y-trees, the result is a circuit for a Boolean function that is truth-table isomorphic to g, i.e. their truth-tables are the same up to a permutation of the inputs. If h and g are truth-table isomorphic then they have the same circuit complexity. Thus it suffices to brute-force over unlabeled (“open”) base circuits and Y-trees, assign variables to inputs arbitrarily, generate each circuit’s truth table, and check if it is truth-table isomorphic to g. This final step is feasible, because truth-table isomorphism testing is efficient.

Theorem 9 (Corollary 1.3 of [31]).

Given the truth-tables for two Boolean functions, testing whether they are equivalent under permutation of variables can be done in time cO(n) where c is a constant.

This results in our final algorithm, which runs in time O(|L|2O((s+m))) where |L| is the number of optimal base f circuits up to permutation of variables, is the maximum fanout in any of those base circuits, s=CC(f), and the asymptotic notation hides encoding overhead from grafting. As discussed above, for 𝖷𝖮𝖱 these parameters are all sufficiently small and hence 𝖷𝖮𝖱-Simple Extension is in 𝖯.

References

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