Marwedel, Peter ;
Wehmeyer, Lars ;
Verma, Manish ;
Steinke, Stefan ;
Helmig, Urs
Fast, predictable and low energy memory references through architecture-aware compilation
Abstract
The design of future high-performance embedded systems is hampered
by two problems: First, the required hardware needs more energy than is
available from batteries. Second, current cache-based approaches for bridging the
increasing speed gap between processors and memories cannot guarantee predictable
real-time behavior. A contribution to solving both problems is made in
this paper which describes a comprehensive set of algorithms that can be applied
at design time in order to maximally exploit scratch pad memories (SPMs). We
show that both the energy consumption as well as the computed worst case execution
time (WCET) can be reduced by up to to 80% and 48%, respectively, by
establishing a strong link between the memory architecture and the compiler.
BibTeX - Entry
@InProceedings{marwedel_et_al:DSP:2004:6,
author = {Peter Marwedel and Lars Wehmeyer and Manish Verma and Stefan Steinke and Urs Helmig},
title = {Fast, predictable and low energy memory references through architecture-aware compilation},
booktitle = {Perspectives Workshop: Design of Systems with Predictable Behaviour},
year = {2004},
editor = {Lothar Thiele and Reinhard Wilhelm},
number = {03471},
series = {Dagstuhl Seminar Proceedings},
ISSN = {1862-4405},
publisher = {Internationales Begegnungs- und Forschungszentrum f{\"u}r Informatik (IBFI), Schloss Dagstuhl, Germany},
address = {Dagstuhl, Germany},
URL = {http://drops.dagstuhl.de/opus/volltexte/2004/6},
annote = {Keywords: Embedded system, compiler, energy efficiency, low power, WCET, scratchpad, memory access}
}
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Keywords: |
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Embedded system, compiler, energy efficiency, low power, WCET, scratchpad, memory access |
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Seminar: |
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03471 - Design of Systems with Predictable Behaviour
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Documenttype: |
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InProceedings |
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Issue date: |
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2004 |
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Date of publication: |
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10.09.2004 |