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Fast, predictable and low energy memory references through architecture-aware compilation

Authors Peter Marwedel, Lars Wehmeyer, Manish Verma, Stefan Steinke, Urs Helmig



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DagSemProc.03471.3.pdf
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Peter Marwedel
Lars Wehmeyer
Manish Verma
Stefan Steinke
Urs Helmig

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Peter Marwedel, Lars Wehmeyer, Manish Verma, Stefan Steinke, and Urs Helmig. Fast, predictable and low energy memory references through architecture-aware compilation. In Perspectives Workshop: Design of Systems with Predictable Behaviour. Dagstuhl Seminar Proceedings, Volume 3471, pp. 1-16, Schloss Dagstuhl - Leibniz-Zentrum für Informatik (2004)
https://doi.org/10.4230/DagSemProc.03471.3

Abstract

The design of future high-performance embedded systems is hampered by two problems: First, the required hardware needs more energy than is available from batteries. Second, current cache-based approaches for bridging the increasing speed gap between processors and memories cannot guarantee predictable real-time behavior. A contribution to solving both problems is made in this paper which describes a comprehensive set of algorithms that can be applied at design time in order to maximally exploit scratch pad memories (SPMs). We show that both the energy consumption as well as the computed worst case execution time (WCET) can be reduced by up to to 80% and 48%, respectively, by establishing a strong link between the memory architecture and the compiler.
Keywords
  • Embedded system
  • compiler
  • energy efficiency
  • low power
  • WCET
  • scratchpad
  • memory access

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