Hiding Communication Delays in Contention-Free Execution for SPM-Based Multi-Core Architectures

Authors Benjamin Rouxel , Stefanos Skalistis , Steven Derrien, Isabelle Puaut

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Benjamin Rouxel
  • Univ Rennes, Inria, CNRS, IRISA, France
Stefanos Skalistis
  • Univ Rennes, Inria, CNRS, IRISA, France
Steven Derrien
  • Univ Rennes, Inria, CNRS, IRISA, France
Isabelle Puaut
  • Univ Rennes, Inria, CNRS, IRISA, France

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Benjamin Rouxel, Stefanos Skalistis, Steven Derrien, and Isabelle Puaut. Hiding Communication Delays in Contention-Free Execution for SPM-Based Multi-Core Architectures. In 31st Euromicro Conference on Real-Time Systems (ECRTS 2019). Leibniz International Proceedings in Informatics (LIPIcs), Volume 133, pp. 25:1-25:24, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2019)


Multi-core systems using ScratchPad Memories (SPMs) are attractive architectures for executing time-critical embedded applications, because they provide both predictability and performance. In this paper, we propose a scheduling technique that jointly selects SPM contents off-line, in such a way that the cost of SPM loading/unloading is hidden. Communications are fragmented to augment hiding possibilities. Experimental results show the effectiveness of the proposed technique on streaming applications and synthetic task-graphs. The overlapping of communications with computations allows the length of generated schedules to be reduced by 4% on average on streaming applications, with a maximum of 16%, and by 8% on average for synthetic task graphs. We further show on a case study that generated schedules can be implemented with low overhead on a predictable multi-core architecture (Kalray MPPA).

Subject Classification

ACM Subject Classification
  • Computer systems organization → Embedded and cyber-physical systems
  • Computer systems organization → Real-time systems
  • Real-time Systems
  • Contention-Free Scheduling
  • SPM multi-core architecture


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