@InProceedings{athanas_et_al:DagSemProc.10281.1,
author = {Athanas, Peter M. and Becker, J\"{u}rgen and Teich, J\"{u}rgen and Verbauwhede, Ingrid},
title = {{10281 Abstracts Collection – Dynamically Reconfigurable Architectures}},
booktitle = {Dynamically Reconfigurable Architectures},
pages = {1--23},
series = {Dagstuhl Seminar Proceedings (DagSemProc)},
ISSN = {1862-4405},
year = {2010},
volume = {10281},
editor = {Peter M. Athanas and J\"{u}rgen Becker and J\"{u}rgen Teich and Ingrid Verbauwhede},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
address = {Dagstuhl, Germany},
URL = {https://drops.dagstuhl.de/entities/document/10.4230/DagSemProc.10281.1},
URN = {urn:nbn:de:0030-drops-28962},
doi = {10.4230/DagSemProc.10281.1},
annote = {Keywords: Dynamically Run-Time Reconfigurable Computing Architectures, Self- adaptive Systems, Computational Models, Circuit Technologies, System Architecture, Reconfigurable/Adaptive Computing based on Nanotechnologies}
}
@InProceedings{athanas_et_al:DagSemProc.10281.2,
author = {Athanas, Peter M. and Becker, J\"{u}rgen and Teich, J\"{u}rgen and Verbauwhede, Ingrid},
title = {{10281 Summary – Dynamically Reconfigurable Architectures}},
booktitle = {Dynamically Reconfigurable Architectures},
series = {Dagstuhl Seminar Proceedings (DagSemProc)},
ISSN = {1862-4405},
year = {2010},
volume = {10281},
editor = {Peter M. Athanas and J\"{u}rgen Becker and J\"{u}rgen Teich and Ingrid Verbauwhede},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
address = {Dagstuhl, Germany},
URL = {https://drops.dagstuhl.de/entities/document/10.4230/DagSemProc.10281.2},
URN = {urn:nbn:de:0030-drops-28926},
doi = {10.4230/DagSemProc.10281.2},
annote = {Keywords: Dynamically Run-Time Reconfigurable Computing Architectures, Self- adaptive Systems, Computational Models, Circuit Technologies, System Architecture, CAD Tool Support, Reconfigurable/Adaptive Computing based on Nanotechnologies}
}
@InProceedings{smit_et_al:DagSemProc.10281.3,
author = {Smit, Gerard J. M. and Kuper, Jan and Baaij, Christiaan P. R.},
title = {{A mathematical approach towards hardware design}},
booktitle = {Dynamically Reconfigurable Architectures},
pages = {1--11},
series = {Dagstuhl Seminar Proceedings (DagSemProc)},
ISSN = {1862-4405},
year = {2010},
volume = {10281},
editor = {Peter M. Athanas and J\"{u}rgen Becker and J\"{u}rgen Teich and Ingrid Verbauwhede},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
address = {Dagstuhl, Germany},
URL = {https://drops.dagstuhl.de/entities/document/10.4230/DagSemProc.10281.3},
URN = {urn:nbn:de:0030-drops-28407},
doi = {10.4230/DagSemProc.10281.3},
annote = {Keywords: Hardware design, mathematical specification, streaming applications}
}
@InProceedings{torresen_et_al:DagSemProc.10281.4,
author = {Torresen, Jim and Koch, Dirk},
title = {{A new project to address run-time reconfigurable hardware systems}},
booktitle = {Dynamically Reconfigurable Architectures},
pages = {1--10},
series = {Dagstuhl Seminar Proceedings (DagSemProc)},
ISSN = {1862-4405},
year = {2010},
volume = {10281},
editor = {Peter M. Athanas and J\"{u}rgen Becker and J\"{u}rgen Teich and Ingrid Verbauwhede},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
address = {Dagstuhl, Germany},
URL = {https://drops.dagstuhl.de/entities/document/10.4230/DagSemProc.10281.4},
URN = {urn:nbn:de:0030-drops-28943},
doi = {10.4230/DagSemProc.10281.4},
annote = {Keywords: }
}
@InProceedings{koch:DagSemProc.10281.5,
author = {Koch, Dirk},
title = {{Advances in Component-based System Design and Partial Run-time Reconfiguration}},
booktitle = {Dynamically Reconfigurable Architectures},
pages = {1--9},
series = {Dagstuhl Seminar Proceedings (DagSemProc)},
ISSN = {1862-4405},
year = {2010},
volume = {10281},
editor = {Peter M. Athanas and J\"{u}rgen Becker and J\"{u}rgen Teich and Ingrid Verbauwhede},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
address = {Dagstuhl, Germany},
URL = {https://drops.dagstuhl.de/entities/document/10.4230/DagSemProc.10281.5},
URN = {urn:nbn:de:0030-drops-28410},
doi = {10.4230/DagSemProc.10281.5},
annote = {Keywords: FPGA design, partial reconfiguretion, component-based design}
}
@InProceedings{huthmann_et_al:DagSemProc.10281.6,
author = {Huthmann, Jens and M\"{u}ller, Peter and Stock, Florian and Hildenbrand, Dietmar and Koch, Andreas},
title = {{Compiling Geometric Algebra Computations into Reconfigurable Hardware Accelerators}},
booktitle = {Dynamically Reconfigurable Architectures},
pages = {1--15},
series = {Dagstuhl Seminar Proceedings (DagSemProc)},
ISSN = {1862-4405},
year = {2010},
volume = {10281},
editor = {Peter M. Athanas and J\"{u}rgen Becker and J\"{u}rgen Teich and Ingrid Verbauwhede},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
address = {Dagstuhl, Germany},
URL = {https://drops.dagstuhl.de/entities/document/10.4230/DagSemProc.10281.6},
URN = {urn:nbn:de:0030-drops-28389},
doi = {10.4230/DagSemProc.10281.6},
annote = {Keywords: Geometric Algebra FPGA High-Level-Compiler Gaalop}
}
@InProceedings{abel:DagSemProc.10281.7,
author = {Abel, Norbert},
title = {{Design and Implementation of an Object-Oriented DPR-Framework}},
booktitle = {Dynamically Reconfigurable Architectures},
pages = {1--9},
series = {Dagstuhl Seminar Proceedings (DagSemProc)},
ISSN = {1862-4405},
year = {2010},
volume = {10281},
editor = {Peter M. Athanas and J\"{u}rgen Becker and J\"{u}rgen Teich and Ingrid Verbauwhede},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
address = {Dagstuhl, Germany},
URL = {https://drops.dagstuhl.de/entities/document/10.4230/DagSemProc.10281.7},
URN = {urn:nbn:de:0030-drops-28365},
doi = {10.4230/DagSemProc.10281.7},
annote = {Keywords: FPGA, DPR, HLS, Object-Orientation}
}
@InProceedings{stechele_et_al:DagSemProc.10281.8,
author = {Stechele, Walter and Claus, Christopher and Laika, Andreas},
title = {{Lessons Learned from last 4 Years of Reconfigurable Computing}},
booktitle = {Dynamically Reconfigurable Architectures},
pages = {1--7},
series = {Dagstuhl Seminar Proceedings (DagSemProc)},
ISSN = {1862-4405},
year = {2010},
volume = {10281},
editor = {Peter M. Athanas and J\"{u}rgen Becker and J\"{u}rgen Teich and Ingrid Verbauwhede},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
address = {Dagstuhl, Germany},
URL = {https://drops.dagstuhl.de/entities/document/10.4230/DagSemProc.10281.8},
URN = {urn:nbn:de:0030-drops-28352},
doi = {10.4230/DagSemProc.10281.8},
annote = {Keywords: Reconfigurable computing, vision-based driver assistance}
}
@InProceedings{hanke_et_al:DagSemProc.10281.9,
author = {Hanke, Matthias and Kranich, Tim and Berekovic, Mladen and Papaefstathiou, Yannis},
title = {{Low-Power Reconfigurable Architectures for High-Performance Mobile Nodes}},
booktitle = {Dynamically Reconfigurable Architectures},
pages = {1--7},
series = {Dagstuhl Seminar Proceedings (DagSemProc)},
ISSN = {1862-4405},
year = {2010},
volume = {10281},
editor = {Peter M. Athanas and J\"{u}rgen Becker and J\"{u}rgen Teich and Ingrid Verbauwhede},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
address = {Dagstuhl, Germany},
URL = {https://drops.dagstuhl.de/entities/document/10.4230/DagSemProc.10281.9},
URN = {urn:nbn:de:0030-drops-28370},
doi = {10.4230/DagSemProc.10281.9},
annote = {Keywords: Reconfiguration, ASIP, RASIP, low power, high performance, video encoding, encryption, wireless sensor node, mobile device}
}
@InProceedings{ziener_et_al:DagSemProc.10281.10,
author = {Ziener, Daniel and Teich, J\"{u}rgen},
title = {{New Directions for IP Core Watermarking and Identification}},
booktitle = {Dynamically Reconfigurable Architectures},
pages = {1--13},
series = {Dagstuhl Seminar Proceedings (DagSemProc)},
ISSN = {1862-4405},
year = {2010},
volume = {10281},
editor = {Peter M. Athanas and J\"{u}rgen Becker and J\"{u}rgen Teich and Ingrid Verbauwhede},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
address = {Dagstuhl, Germany},
URL = {https://drops.dagstuhl.de/entities/document/10.4230/DagSemProc.10281.10},
URN = {urn:nbn:de:0030-drops-28437},
doi = {10.4230/DagSemProc.10281.10},
annote = {Keywords: IP protection, IP cores, watermarking}
}
@InProceedings{mentens_et_al:DagSemProc.10281.11,
author = {Mentens, Nele and Vliegen, Jo and Braeken, An and Touhafi, Abdellah and Wouters, Karel and Verbauwhede, Ingrid},
title = {{Secure remote reconfiguration of FPGAs}},
booktitle = {Dynamically Reconfigurable Architectures},
pages = {1--4},
series = {Dagstuhl Seminar Proceedings (DagSemProc)},
ISSN = {1862-4405},
year = {2010},
volume = {10281},
editor = {Peter M. Athanas and J\"{u}rgen Becker and J\"{u}rgen Teich and Ingrid Verbauwhede},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
address = {Dagstuhl, Germany},
URL = {https://drops.dagstuhl.de/entities/document/10.4230/DagSemProc.10281.11},
URN = {urn:nbn:de:0030-drops-28391},
doi = {10.4230/DagSemProc.10281.11},
annote = {Keywords: FPGA, cryptography, security, remote configuration}
}
@InProceedings{chen_et_al:DagSemProc.10281.12,
author = {Chen, Xiaolei and Ha, Yajun},
title = {{The Optimization of Interconnection Networks in FPGAs}},
booktitle = {Dynamically Reconfigurable Architectures},
pages = {1--9},
series = {Dagstuhl Seminar Proceedings (DagSemProc)},
ISSN = {1862-4405},
year = {2010},
volume = {10281},
editor = {Peter M. Athanas and J\"{u}rgen Becker and J\"{u}rgen Teich and Ingrid Verbauwhede},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
address = {Dagstuhl, Germany},
URL = {https://drops.dagstuhl.de/entities/document/10.4230/DagSemProc.10281.12},
URN = {urn:nbn:de:0030-drops-28425},
doi = {10.4230/DagSemProc.10281.12},
annote = {Keywords: Field-programmable gate array, architecture, computer-aided design}
}
@InProceedings{cumplido_et_al:DagSemProc.10281.13,
author = {Cumplido, Rene and Campos, Juan Manuel and Feregrino-Uribe, Claudia and Perez-Andrade, Jose Roberto},
title = {{Towards a reconfigurable hardware architecture for implementing a LDPC module suitable for software radio systems}},
booktitle = {Dynamically Reconfigurable Architectures},
pages = {1--8},
series = {Dagstuhl Seminar Proceedings (DagSemProc)},
ISSN = {1862-4405},
year = {2010},
volume = {10281},
editor = {Peter M. Athanas and J\"{u}rgen Becker and J\"{u}rgen Teich and Ingrid Verbauwhede},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
address = {Dagstuhl, Germany},
URL = {https://drops.dagstuhl.de/entities/document/10.4230/DagSemProc.10281.13},
URN = {urn:nbn:de:0030-drops-28950},
doi = {10.4230/DagSemProc.10281.13},
annote = {Keywords: LDPC codes, Software Defined Radio, Hardware Implementation}
}
@InProceedings{hredzak_et_al:DagSemProc.10281.14,
author = {Hredzak, Branislav and Diessel, Oliver},
title = {{Towards Dilated Placement of Dynamic NoC Cores}},
booktitle = {Dynamically Reconfigurable Architectures},
pages = {1--18},
series = {Dagstuhl Seminar Proceedings (DagSemProc)},
ISSN = {1862-4405},
year = {2010},
volume = {10281},
editor = {Peter M. Athanas and J\"{u}rgen Becker and J\"{u}rgen Teich and Ingrid Verbauwhede},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
address = {Dagstuhl, Germany},
URL = {https://drops.dagstuhl.de/entities/document/10.4230/DagSemProc.10281.14},
URN = {urn:nbn:de:0030-drops-28344},
doi = {10.4230/DagSemProc.10281.14},
annote = {Keywords: Modular reconfiguration, networks-on-chip, application mapping, dilation}
}
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