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URN: urn:nbn:de:0030-drops-19245
URL: http://drops.dagstuhl.de/opus/volltexte/2009/1924/

Fuchs, Gottfried

Implications of VLSI Fault Models and Distributed Systems Failure Models -- A hardware designer's view

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Abstract

The fault and failure models as well as their semantics within the VLSI and the distributed systems/algorithms community are quite different. Pointing out the mismatch of those fault respectively failure models is the main part of this work. The impact of the implemented failure model in terms of hardware effort and system complexity will be shown on different VLSI implementations of distributed algorithms. However, still, there are a lot of open questions left mostly related to the coverage analysis of hardware implemented fault-tolerant algorithms.

BibTeX - Entry

@InProceedings{fuchs:DSP:2009:1924,
  author =	{Gottfried Fuchs},
  title =	{Implications of VLSI Fault Models and Distributed Systems Failure Models -- A hardware designer's view},
  booktitle =	{Fault-Tolerant Distributed Algorithms on VLSI Chips },
  year =	{2009},
  editor =	{Bernadette Charron-Bost and Shlomi Dolev and Jo Ebergen and Ulrich Schmid},
  number =	{08371},
  series =	{Dagstuhl Seminar Proceedings},
  ISSN =	{1862-4405},
  publisher =	{Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik, Germany},
  address =	{Dagstuhl, Germany},
  URL =		{http://drops.dagstuhl.de/opus/volltexte/2009/1924},
  annote =	{Keywords: VLSI, fault model, distributed system, failure model}
}

Keywords: VLSI, fault model, distributed system, failure model
Seminar: 08371 - Fault-Tolerant Distributed Algorithms on VLSI Chips
Issue date: 2009
Date of publication: 13.03.2009


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