DagSemProc.08371.4.pdf
- Filesize: 163 kB
- 7 pages
Document
Implications of VLSI Fault Models and Distributed Systems Failure Models – A hardware designer's view
Author
-
Part of:
Volume:
Dagstuhl Seminar Proceedings, Volume 8371
Series: Dagstuhl Seminar Proceedings (DagSemProc) - License:
Creative Commons Attribution 4.0 International license
- Publication Date: 2009-03-13
Cite As Get BibTex
Gottfried Fuchs. Implications of VLSI Fault Models and Distributed Systems Failure Models – A hardware designer's view. In Fault-Tolerant Distributed Algorithms on VLSI Chips. Dagstuhl Seminar Proceedings, Volume 8371, pp. 1-7, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2009)
https://doi.org/10.4230/DagSemProc.08371.4
Abstract
The fault and failure models as well as their semantics within the VLSI and the distributed systems/algorithms community are quite different. Pointing out the mismatch of those fault respectively failure models is the main part of this work. The impact of the implemented failure model in terms of hardware effort and system complexity will be shown on different VLSI implementations of distributed algorithms. However, still, there are a lot of open questions left mostly related to the coverage analysis of hardware implemented fault-tolerant algorithms.
Subject Classification
Keywords
- VLSI
- fault model
- distributed system
- failure model
Metrics
- Access Statistics
-
Total Accesses (updated on a weekly basis)
0PDF Downloads