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Satisfiability Checking of Multi-Variable TPTL with Unilateral Intervals Is PSPACE-Complete

Authors Shankara Narayanan Krishna , Khushraj Nanik Madnani , Rupak Majumdar , Paritosh Pandya

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Author Details

Shankara Narayanan Krishna
  • IIT Bombay, Mumbai, India
Khushraj Nanik Madnani
  • MPI-SWS, Kaiserslautern, Germany
Rupak Majumdar
  • MPI-SWS, Kaiserslautern, Germany
Paritosh Pandya
  • IIT Bombay, Mumbai, India

Funding

This research was sponsored in part by the Deutsche Forschungsgemeinschaft project 389792660 TRR 248—CPEC.

Acknowledgements

We thank Tom Henzinger for encouraging us to explore non-punctual subclasses for multi-clock TPTL and ATA. We also thank Hsi-Ming Ho for an insightful discussion.

Cite AsGet BibTex

Shankara Narayanan Krishna, Khushraj Nanik Madnani, Rupak Majumdar, and Paritosh Pandya. Satisfiability Checking of Multi-Variable TPTL with Unilateral Intervals Is PSPACE-Complete. In 34th International Conference on Concurrency Theory (CONCUR 2023). Leibniz International Proceedings in Informatics (LIPIcs), Volume 279, pp. 23:1-23:18, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2023)
https://doi.org/10.4230/LIPIcs.CONCUR.2023.23

Abstract

We investigate the decidability of the {0,∞} fragment of Timed Propositional Temporal Logic (TPTL). We show that the satisfiability checking of TPTL^{0,∞} is PSPACE-complete. Moreover, even its 1-variable fragment (1-TPTL^{0,∞}) is strictly more expressive than Metric Interval Temporal Logic (MITL) for which satisfiability checking is EXPSPACE complete. Hence, we have a strictly more expressive logic with computationally easier satisfiability checking. To the best of our knowledge, TPTL^{0,∞} is the first multi-variable fragment of TPTL for which satisfiability checking is decidable without imposing any bounds/restrictions on the timed words (e.g. bounded variability, bounded time, etc.). The membership in PSPACE is obtained by a reduction to the emptiness checking problem for a new "non-punctual’’ subclass of Alternating Timed Automata with multiple clocks called Unilateral Very Weak Alternating Timed Automata (VWATA^{0,∞}) which we prove to be in PSPACE. We show this by constructing a simulation equivalent non-deterministic timed automata whose number of clocks is polynomial in the size of the given VWATA^{0,∞}.

Subject Classification

ACM Subject Classification
  • Theory of computation → Logic
Keywords
  • TPTL
  • Satisfiability
  • Non-Punctuality
  • Decidability
  • Expressiveness
  • ATA

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