The Heptane Static Worst-Case Execution Time Estimation Tool

Authors Damien Hardy, Benjamin Rouxel, Isabelle Puaut

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Damien Hardy
Benjamin Rouxel
Isabelle Puaut

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Damien Hardy, Benjamin Rouxel, and Isabelle Puaut. The Heptane Static Worst-Case Execution Time Estimation Tool. In 17th International Workshop on Worst-Case Execution Time Analysis (WCET 2017). Open Access Series in Informatics (OASIcs), Volume 57, pp. 8:1-8:12, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2017)


Estimation of worst-case execution times (WCETs) is required to validate the temporal behavior of hard real time systems. Heptane is an open-source software program that estimates upper bounds of execution times on MIPS and ARM v7 architectures, offered to the WCET estimation community to experiment new WCET estimation techniques. The software architecture of Heptane was designed to be as modular and extensible as possible to facilitate the integration of new approaches. This paper is devoted to a description of Heptane, and includes information on the analyses it implements, how to use it and extend it.
  • Worst-Case Execution Time Estimation
  • Static Analysis
  • WCET Estimation Tool
  • Implicit Path Enumeration Technique


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  1. Jaume Abella, Damien Hardy, Isabelle Puaut, Eduardo Quiñones, and Francisco J. Cazorla. On the comparison of deterministic and probabilistic WCET estimation techniques. In 26th Euromicro Conference on Real-Time Systems, ECRTS 2014, Madrid, Spain, July 8-11, 2014, pages 266-275, 2014. Google Scholar
  2. aiT. URL:
  3. Adnan Bouakaz, Isabelle Puaut, and Erven Rohou. Predictable binary code cache: A first step towards reconciling predictability and just-in-time compilation. In 17th IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS 2011, Chicago, Illinois, USA, 11-14 April 2011, pages 223-232, 2011. Google Scholar
  4. Bound-T. URL:
  5. Chronos. URL:
  6. Antoine Colin and Isabelle Puaut. Worst case execution time analysis for a processor with branch prediction. Real-Time Syst., 18(2/3):249-274, May 2000. Google Scholar
  7. P. Cousot and R. Cousot. Abstract interpretation: a unified lattice model for static analysis of programs by construction or approximation of fixpoints. In Conference Record of the Fourth Annual ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages, pages 238-252, Los Angeles, California, 1977. ACM Press, New York, NY. Google Scholar
  8. Damien Hardy, Thomas Piquet, and Isabelle Puaut. Using bypass to tighten WCET estimates for multi-core processors with shared instruction caches. In Proceedings of the 30th IEEE Real-Time Systems Symposium, RTSS 2009, Washington, DC, USA, 1-4 December 2009, pages 68-77, 2009. Google Scholar
  9. Damien Hardy and Isabelle Puaut. Predictable code and data paging for real time systems. In 20th Euromicro Conference on Real-Time Systems, ECRTS 2008, 2-4 July 2008, Prague, Czech Republic, Proceedings, pages 266-275, 2008. Google Scholar
  10. Damien Hardy and Isabelle Puaut. WCET analysis of multi-level non-inclusive set-associative instruction caches. In Proceedings of the 29th IEEE Real-Time Systems Symposium, RTSS 2008, Barcelona, Spain, December 2008, pages 456-466, 2008. Google Scholar
  11. Damien Hardy and Isabelle Puaut. WCET analysis of instruction cache hierarchies. Journal of Systems Architecture, 57(7):677-694, 2011. Special Issue on Worst-Case Execution-Time Analysis. URL:
  12. Damien Hardy and Isabelle Puaut. Static probabilistic worst case execution time estimation for architectures with faulty instruction caches. Real-Time Systems, 51(2):128-152, 2015. Google Scholar
  13. B. K. Huynh, L. Ju, and A. Roychoudhury. Scope-aware data cache analysis for wcet estimation. In 2011 17th IEEE Real-Time and Embedded Technology and Applications Symposium, pages 203-212, April 2011. URL:
  14. Benjamin Lesage, Damien Hardy, and Isabelle Puaut. WCET analysis of multi-level set-associative data caches. In Niklas Holsti, editor, 9th Intl. Workshop on Worst-Case Execution Time (WCET) Analysis, volume 10 of OpenAccess Series in Informatics (OASIcs), pages 1-12, Dagstuhl, Germany, 2009. Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik. URL:
  15. Benjamin Lesage, Isabelle Puaut, and André Seznec. PRETI: partitioned real-time shared cache for mixed-criticality real-time systems. In 20th International Conference on Real-Time and Network Systems, RTNS'12, Pont a Mousson, France - November 8-9, 2012, pages 171-180, 2012. Google Scholar
  16. Hanbing Li, Isabelle Puaut, and Erven Rohou. Tracing flow information for tighter WCET estimation: Application to vectorization. In 21st IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2015, Hong Kong, China, August 19-21, 2015, pages 217-226, 2015. Google Scholar
  17. Y.-T. S. Li and S. Malik. Performance analysis of embedded software using implicit path enumeration. In Richard Gerber and Thomas Marlowe, editors, LCTES'95: Proceedings of the ACM SIGPLAN 1995 workshop on Languages, compilers, &tools for real-time systems, volume 30, pages 88-98, New York, NY, USA, 1995. URL:
  18. T. Lundqvist and P. Stenström. Timing anomalies in dynamically scheduled microprocessors. In Real-Time Systems Symposium, pages 12-21, 1999. Google Scholar
  19. José Marinho, Vincent Nélis, Stefan M. Petters, and Isabelle Puaut. Preemption delay analysis for floating non-preemptive region scheduling. In 2012 Design, Automation & Test in Europe Conference & Exhibition, DATE 2012, Dresden, Germany, March 12-16, 2012, pages 497-502, 2012. Google Scholar
  20. OTAWA. URL:
  21. Dumitru Potop-Butucaru and Isabelle Puaut. Integrated worst-case execution time estimation of multicore applications. In 13th International Workshop on Worst-Case Execution Time Analysis, WCET 2013, July 9, 2013, Paris, France, volume 30 of OpenAccess Series in Informatics (OASIcs), pages 21-31. Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik, 2013. URL:
  22. Syed Aftab Rashid, Geoffrey Nelissen, Damien Hardy, Benny Akesson, Isabelle Puaut, and Eduardo Tovar. Cache-persistence-aware response-time analysis for fixed-priority preemptive systems. In 28th Euromicro Conference on Real-Time Systems, ECRTS 2016, Toulouse, France, July 5-8, 2016, pages 262-272, 2016. Google Scholar
  23. Jan Reineke, Daniel Grund, Christoph Berg, and Reinhard Wilhelm. Timing predictability of cache replacement policies. Real-Time Systems, 37(2):99-122, 2007. URL:
  24. Martin Schoeberl, Sahar Abbaspour, Benny Akesson, Neil Audsley, Raffaele Capasso, Jamie Garside, Kees Goossens, Sven Goossens, Scott Hansen, Reinhold Heckmann, Stefan Hepp, Benedikt Huber, Alexander Jordan, Evangelia Kasapaki, Jens Knoop, Yonghui Li, Daniel Prokesch, Wolfgang Puffitsch, Peter Puschner, André Rocha, Cláudio Silva, Jens Sparsø, and Alessandro Tocchi. T-CREST: Time-predictable multi-core architecture for embedded systems. Journal of Systems Architecture, 61(9):449-471, 2015. URL:, URL:
  25. Vugranam C. Sreedhar, Guang R. Gao, and Yong-Fong Lee. Identifying loops using DJ graphs. ACM Trans. Program. Lang. Syst., 18(6):649-658, November 1996. Google Scholar
  26. SWEET. URL:
  27. Henrik Theiling, Christian Ferdinand, and Reinhard Wilhelm. Fast and precise WCET prediction by separated cache and path analyses. Real-Time Systems, 18(2-3):157-179, 2000. Google Scholar
  28. Tutor 2016. URL:
  29. Reinhard Wilhelm, Jakob Engblom, Andreas Ermedahl, Niklas Holsti, Stephan Thesing, David Whalley, Guillem Bernat, Christian Ferdinand, Reinhold Heckmann, Tulika Mitra, Frank Mueller, Isabelle Puaut, Peter Puschner, Jan Staschulat, and Per Stenström. The worst-case execution-time problem - overview of methods and survey of tools. ACM Trans. Embed. Comput. Syst., 7(3):36:1-36:53, May 2008. URL:
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