OASIcs.WCET.2022.1.pdf
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StAMP: Static Analysis of Memory Access Profiles for Real-Time Tasks
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Isabelle Puaut 
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20th International Workshop on Worst-Case Execution Time Analysis (WCET 2022)
Series: Open Access Series in Informatics (OASIcs)
Conference: Workshop on Worst-Case Execution Time Analysis (WCET) - License:
Creative Commons Attribution 4.0 International license
- Publication Date: 2022-07-14
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Acknowledgements
The authors would like to thank Abderaouf Nassim Amalou and the anonymous reviewers for their fruitful comments on earlier drafts of this paper.
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Théo Degioanni and Isabelle Puaut. StAMP: Static Analysis of Memory Access Profiles for Real-Time Tasks. In 20th International Workshop on Worst-Case Execution Time Analysis (WCET 2022). Open Access Series in Informatics (OASIcs), Volume 103, pp. 1:1-1:13, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2022)
https://doi.org/10.4230/OASIcs.WCET.2022.1
https://doi.org/10.4230/OASIcs.WCET.2022.1
Abstract
Accesses to shared resources in multi-core systems raise predictability issues. The delay in accessing a resource for a task executing on a core depends on concurrent resource sharing from tasks executing on the other cores. In this paper, we present StAMP, a compiler technique that splits the code of tasks into a sequence of code intervals intervals, each with a distinct worst-case memory access profile. The intervals identified by StAMP can serve as inputs to scheduling techniques for a tight calculation of worst-case delays of memory accesses. The provided information can also ease the design of mechanisms that avoid and/or control interference between tasks at run-time. An important feature of StAMP compared to related work lies in its ability to link back time intervals to unique locations in the code of tasks, allowing easy implementation of elaborate run-time decisions related to interference management.
Subject Classification
ACM Subject Classification
- Computer systems organization → Real-time systems
- Computer systems organization → Embedded systems
Keywords
- Worst-Case Execution Time Estimation
- Static Analysis
- Multicore
- Interference
- Implicit Path Enumeration Technique
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References
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