License
When quoting this document, please refer to the following
URN: urn:nbn:de:0030-drops-28425
URL: http://drops.dagstuhl.de/opus/volltexte/2010/2842/
Go to the corresponding Portal


Chen, Xiaolei ; Ha, Yajun

The Optimization of Interconnection Networks in FPGAs

pdf-format:
Document 1.pdf (294 KB)


Abstract

Scaling technology enables even higher degree of integration for FPGAs, but also brings new challenges that need to be addressed from both the architecture and the design tools side. Optimization of FPGA interconnection network is essential, given that interconnects dominate logic. Two approaches are presented, with one based on the time-multiplexing of wires and the other using hierarchical interconnects of high-speed serial links and switches. Design tools for both approaches are discussed. Preliminary experiments and prototypes are presented, and show positive results.

BibTeX - Entry

@InProceedings{chen_et_al:DSP:2010:2842,
  author =	{Xiaolei Chen and Yajun Ha},
  title =	{{The Optimization of Interconnection Networks in FPGAs}},
  booktitle =	{Dynamically Reconfigurable Architectures},
  year =	{2010},
  editor =	{Peter M. Athanas and J{\"u}rgen Becker and J{\"u}rgen Teich and Ingrid Verbauwhede},
  number =	{10281},
  series =	{Dagstuhl Seminar Proceedings},
  ISSN =	{1862-4405},
  publisher =	{Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik, Germany},
  address =	{Dagstuhl, Germany},
  URL =		{http://drops.dagstuhl.de/opus/volltexte/2010/2842},
  annote =	{Keywords: Field-programmable gate array, architecture, computer-aided design}
}

Keywords: Field-programmable gate array, architecture, computer-aided design
Seminar: 10281 - Dynamically Reconfigurable Architectures
Issue Date: 2010
Date of publication: 14.12.2010


DROPS-Home | Fulltext Search | Imprint Published by LZI