Requirements for and Design of a Processor with Predictable Timing

Berg, Christoph; Engblom, Jakob; Wilhelm, Reinhard

doi:10.4230/DagSemProc.03471.4

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Requirements for and Design of a Processor with Predictable Timing

Authors Christoph Berg, Jakob Engblom, Reinhard Wilhelm

Part of: Volume: Dagstuhl Seminar Proceedings, Volume 3471
Part of: Series: Dagstuhl Seminar Proceedings (DagSemProc)
License: Creative Commons Attribution 4.0 International license
Publication Date: 2004-09-10

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DagSemProc.03471.4.pdf

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Document Identifiers

DOI: 10.4230/DagSemProc.03471.4
URN: urn:nbn:de:0030-drops-57

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Keywords

WCET
hard real-time
embedded systems
computer architecture

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Abstract

This paper introduces a set of design principles that aim to make processor
architectures amenable to static timing analysis. Based on these principles,
we give a design of a hard real-time processor with predictable timing, which is
simultaneously capable of reaching respectable performance levels.
The design principles we identify are recoverability from information loss in
the analysis, minimal variation of the instruction timing, non-interference between
processor components, deterministic processor behavior, and comprehensive
documentation. The principles are based on our experience and that of other
researchers in building timing analysis tools for existing processors.

Cite As Get BibTex

Christoph Berg, Jakob Engblom, and Reinhard Wilhelm. Requirements for and Design of a Processor with Predictable Timing. In Perspectives Workshop: Design of Systems with Predictable Behaviour. Dagstuhl Seminar Proceedings, Volume 3471, pp. 1-20, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2004) https://doi.org/10.4230/DagSemProc.03471.4

Author Details

Christoph Berg

Jakob Engblom

Reinhard Wilhelm

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