DagSemProc.10281.6.pdf
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Compiling Geometric Algebra Computations into Reconfigurable Hardware Accelerators
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Dagstuhl Seminar Proceedings, Volume 10281
Series: Dagstuhl Seminar Proceedings (DagSemProc) - License:
Creative Commons Attribution 4.0 International license
- Publication Date: 2010-12-14
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Jens Huthmann, Peter Müller, Florian Stock, Dietmar Hildenbrand, and Andreas Koch. Compiling Geometric Algebra Computations into Reconfigurable Hardware Accelerators. In Dynamically Reconfigurable Architectures. Dagstuhl Seminar Proceedings, Volume 10281, pp. 1-15, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2010)
https://doi.org/10.4230/DagSemProc.10281.6
https://doi.org/10.4230/DagSemProc.10281.6
Abstract
Geometric Algebra (GA), a generalization of quaternions and complex numbers, is a very
powerful framework for intuitively expressing and manipulating the complex
geometric relationships common to engineering problems.
However, actual processing of GA expressions is very compute intensive, and
acceleration is generally required for practical use. GPUs and FPGAs offer
such acceleration, while requiring only low-power per operation.
In this paper, we present key components of a proof-of-concept compile flow
combining symbolic and hardware optimization techniques to
automatically generate hardware accelerators from the abstract GA descriptions that are suitable for high-performance embedded computing.
Keywords
- Geometric Algebra FPGA High-Level-Compiler Gaalop
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