Methods and Metrics for Reliability Assessment

Alves de Barros-Naviner, Lirida; Naviner, Jean-François; Teixeira Franco, Denis; Correia de Vasconcelos, Mai

doi:10.4230/DagSemProc.08371.5

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Methods and Metrics for Reliability Assessment

Authors Lirida Alves de Barros-Naviner, Jean-François Naviner, Denis Teixeira Franco, Mai Correia de Vasconcelos

Part of: Volume: Dagstuhl Seminar Proceedings, Volume 8371
Part of: Series: Dagstuhl Seminar Proceedings (DagSemProc)
License: Creative Commons Attribution 4.0 International license
Publication Date: 2009-03-13

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Document Identifiers

DOI: 10.4230/DagSemProc.08371.5
URN: urn:nbn:de:0030-drops-19252

Subject Classification

Keywords

Reliability
fault tolerance
combinational logic

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Abstract

This paper deals with digital VLSI design aspects related
to reliability. The focus is on the problem of reliability evaluation in
combinational logic circuits.We present some methods for this evaluation
that can be easily integrated in a tradidional design flow. Also we describe
suitable metrics for performance estimation of concurrent error detection
schemes.

Cite As Get BibTex

Lirida Alves de Barros-Naviner, Jean-François Naviner, Denis Teixeira Franco, and Mai Correia de Vasconcelos. Methods and Metrics for Reliability Assessment. In Fault-Tolerant Distributed Algorithms on VLSI Chips. Dagstuhl Seminar Proceedings, Volume 8371, pp. 1-15, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2009) https://doi.org/10.4230/DagSemProc.08371.5

Author Details

Lirida Alves de Barros-Naviner

Jean-François Naviner

Denis Teixeira Franco

Mai Correia de Vasconcelos

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