Document Open Access Logo

Crêpe: Clock-Reconfiguration-Aware Preemption Control in Real-Time Systems with Devices

Authors Eva Dengler , Peter Wägemann

PDF
Thumbnail PDF

File

LIPIcs.ECRTS.2024.10.pdf
  • Filesize: 3.68 MB
  • 25 pages

Document Identifiers

Author Details

Eva Dengler
  • Friedrich-Alexander-Universität Erlangen-Nürnberg, Germany
Peter Wägemann
  • Friedrich-Alexander-Universität Erlangen-Nürnberg, Germany

Funding

This work is funded by the German Research Foundation (Deutsche Forschungsgemeinschaft, DFG) under the project number 502947440 (WA 5186/1-1, Watwa: Whole-System Optimality Analysis and Tailoring of Worst-Case-Constrained Applications).

Cite AsGet BibTex

Eva Dengler and Peter Wägemann. Crêpe: Clock-Reconfiguration-Aware Preemption Control in Real-Time Systems with Devices. In 36th Euromicro Conference on Real-Time Systems (ECRTS 2024). Leibniz International Proceedings in Informatics (LIPIcs), Volume 298, pp. 10:1-10:25, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2024)
https://doi.org/10.4230/LIPIcs.ECRTS.2024.10

Abstract

The domain of energy-constrained real-time systems that are operated on modern embedded system-on-chip (SoC) platforms brings numerous novel challenges for optimal resource minimization. These modern hardware platforms offer a heterogeneous variety of features to configure the tradeoff between temporal performance and energy efficiency, which goes beyond the state-of-the-art of existing dynamic-voltage-frequency-scaling (DVFS) scheduling schemes. The control center for configuring this tradeoff on platforms are complex clock subsystems that are intertwined with requirements of the SoC’s components (e.g., transceiver/memory/sensor devices). That is, several devices have precedence constraints with respect to specific clock sources and their settings. The challenge of dynamically adapting the various clock sources to select resource-optimal configurations becomes especially challenging in the presence of asynchronous preemptions, which are inherent to systems that use devices. In this paper, we present Crêpe, an approach to clock-reconfiguration-aware preemption control: Crêpe has an understanding of the target platform’s clock subsystem, its sleep states, and penalties to reconfigure clock sources for adapting clock frequencies. Crêpe’s hardware model is combined with an awareness of the application’s device requirements for each executed task, as well as possible interrupts that cause preemptions during runtime. Using these software/hardware constraints, Crêpe employs, in its offline phase, a mathematical formalization in order to select energy-minimal configurations while meeting given deadlines. This optimizing formalization, processed by standard mathematical solver tools, accounts for potentially occurring interrupts and the respective clock reconfigurations, which are then forwarded as alternative schedules to Crêpe’s runtime system. During runtime, the dispatcher assesses these offline-determined alternative schedules and reconfigures the clock sources for energy minimization. We developed an implementation based on a widely-used SoC platform (i.e., ESP32-C3) and an automated testbed for comprehensive energy-consumption evaluations to validate Crêpe’s claim of selecting resource-optimal settings under worst-case considerations.

Subject Classification

ACM Subject Classification
  • Computer systems organization → Real-time systems
  • Computer systems organization → Embedded systems
Keywords
  • energy-constrained real-time systems
  • time/energy tradeoff
  • system-on-chip
  • energy-aware real-time scheduling
  • resource minimization
  • preemption control
  • worst-case energy consumption (WCEC)
  • worst-case execution time (WCET)
  • static whole-system analysis

Metrics

  • Access Statistics
  • Total Accesses (updated on a weekly basis)
    0
    PDF Downloads
    0
    Metadata Views

Supplementary Materials

References

  1. S. Ahmed, B. Islam, K. S. Yildirim, M. Zimmerling, P. Pawełczak, M. H. Alizai, B. Lucia, L. Mottola, J. Sorber, and J. Hester. The internet of batteryless things. Communications of the ACM, 67(3):64-73, 2024. URL: https://doi.org/10.1145/3624718.
  2. Sebastian Altmeyer, Robert I Davis, and Claire Maiza. Cache related pre-emption delay aware response time analysis for fixed priority pre-emptive systems. Real-Time Systems, 48(5):499-526, 2012. URL: https://doi.org/10.1007/s11241-012-9152-2.
  3. J. H. Anderson and S. K.. Baruah. Energy-efficient synthesis of periodic task systems upon identical multiprocessor platforms. In Proceedings of the 24th International Conference on Distributed Computing Systems (ICDCS '04), pages 428-435, 2004. URL: https://doi.org/10.1109/ICDCS.2004.1281609.
  4. H. Aydin, R. Melhem, D. Mosse, and P. Mejia-Alvarez. Determining optimal processor speeds for periodic real-time tasks with different power characteristics. In Proceedings 13th Euromicro Conference on Real-Time Systems (ECRTS '01), pages 225-232, 2001. Google Scholar
  5. Hakan Aydin, Rami Melhem, Daniel Mossé, and Pedro Mejía-Alvarez. Power-aware scheduling for periodic real-time tasks. IEEE Transactions on Computers, 53(05):584-600, 2004. URL: https://doi.org/10.1109/TC.2004.1275298.
  6. C. Ballabriga, H. Cassé, C. Rochange, and P. Sainrat. OTAWA: An open toolbox for adaptive WCET analysis. In Proceedings of the 8th International Workshop on Software Technolgies for Embedded and Ubiquitous Systems (SEUS '10), pages 35-46, 2010. URL: https://doi.org/10.1007/978-3-642-16256-5_6.
  7. Mario Bambagini, Mauro Marinoni, Hakan Aydin, and Giorgio Buttazzo. Energy-aware scheduling for real-time systems: A survey. ACM Transactions on Embedded Computing Systems (ACM TECS), 15(1):7:1-7:34, 2016. URL: https://doi.org/10.1145/2808231.
  8. Enrico Bini and Giorgio C. Buttazzo. Measuring the performance of schedulability tests. Real-Time Systems, 30:129-154, 2005. URL: https://doi.org/10.1007/s11241-005-0507-9.
  9. Alan Burns. Preemptive priority-based scheduling: an appropriate engineering approach. In Advances in Real-Time Systems, pages 225-248. Prentice-Hall, Inc., 1995. Google Scholar
  10. J. V. Busquets-Mataix, J. J. Serrano, R. Ors, P. Gil, and A. Wellings. Adding instruction cache effect to schedulability analysis of preemptive real-time systems. In Proceedings of the 2nd Real-Time Technology and Applications Symposium (RTAS '96), pages 204-212, 1996. Google Scholar
  11. Giorgio C. Buttazzo, Marko Bertogna, and Gang Yao. Limited preemptive scheduling for real-time systems. a survey. IEEE Transactions on Industrial Informatics, 9(1):3-15, 2013. URL: https://doi.org/10.1109/TII.2012.2188805.
  12. N. Chang, K. Kim, and H. G. Lee. Cycle-accurate energy consumption measurement and analysis: Case study of ARM7TDMI. In Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED '00), pages 185-190, 2000. Google Scholar
  13. Jian-Jia Chen and Tei-Wei Kuo. Procrastination determination for periodic real-time tasks in leakage-aware dynamic voltage scaling systems. In Proceedings of the International Conference on Computer-Aided Design (ICCAD '07), pages 289-294, 2007. URL: https://doi.org/10.1109/ICCAD.2007.4397279.
  14. Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, and John Sartori. Determining application-specific peak power and energy requirements for ultra-low-power processors. ACM Transactions on Computer Systems (TOCS), 35(3):9:1-9:33, 2017. URL: https://doi.org/10.1145/3148052.
  15. Holly Chiang, Hudson Ayers, Daniel Giffin, Amit Levy, and Philip Levis. Power Clocks: Dynamic multi-clock management for embedded systems. In Proceedings of the International Conference on Embedded Wireless Systems and Networks (EWSN '21), pages 139-150, 2021. Google Scholar
  16. Robert I Davis. Burns standard notation for real time scheduling. Real-Time Systems: The past, the present, and the future. N. Audsley, SK Baruah Editors, pages 38-41, 2013. Google Scholar
  17. Eva Dengler, Phillip Raffeck, Simon Schuster, and Peter Wägemann. FusionClock: Energy-optimal clock-tree reconfigurations for energy-constrained real-time systems. In Proceedings of the 35th Euromicro Conference on Real-Time Systems (ECRTS '23), volume 262, pages 6:1-6:24, 2023. URL: https://doi.org/10.4230/LIPIcs.ECRTS.2023.6.
  18. Espressif Systems. ESP32-C3 Technical Reference Manual, 2022. Pre-release v0.7. URL: https://www.espressif.com/sites/default/files/documentation/esp32-c3_technical_reference_manual_en.pdf.
  19. Espressif Systems. ESP32-C3 Series Datasheet Ultra-Low-Power SoC with RISC-V Single-Core CPU, 2023. Version 1.4. URL: https://www.espressif.com/sites/default/files/documentation/esp32-c3_datasheet_en.pdf.
  20. H. Falk and P. Lokuciejewski. A compiler framework for the reduction of worst-case execution times. Real-time Systems, 46(2):251-300, 2010. URL: https://doi.org/10.1007/s11241-010-9101-x.
  21. Christian Ferdinand and Reinhold Heckmann. aiT: Worst-case execution time prediction by static program analysis. Building the Information Society, 156:377-383, 2004. URL: https://doi.org/10.1007/978-1-4020-8157-6_29.
  22. Zhishan Guo, Ashikahmed Bhuiyan, Abusayeed Saifullah, Nan Guan, and Haoyi Xiong. Energy-efficient multi-core scheduling for real-time dag tasks. In Proceedings of the 29th Euromicro Conference on Real-Time Systems (ECRTS '17), volume 76 of Leibniz International Proceedings in Informatics (LIPIcs), pages 22:1-22:21, 2017. URL: https://doi.org/10.4230/LIPIcs.ECRTS.2017.22.
  23. Gurobi Optimization, LLC. Gurobi optimizer reference manual. URL: https://www.gurobi.com/.
  24. Sebastian Hahn, Michael Jacobs, Nils Hölscher, Kuan-Hsun Chen, Jian-Jia Chen, and Jan Reineke. LLVMTA: An llvm-based wcet analysis tool. In Proceedings of the 20th International Workshop on Worst-Case Execution Time Analysis (WCET '22), pages 2:1-2:17, 2022. URL: https://doi.org/10.4230/OASIcs.WCET.2022.2.
  25. Sebastian Hahn, Jan Reineke, and Reinhard Wilhelm. Towards compositionality in execution time analysis: Definition and challenges. ACM SIGBED Review, 12(1):28-36, 2015. URL: https://doi.org/10.1145/2752801.2752805.
  26. Damien Hardy, Benjamin Rouxel, and Isabelle Puaut. The Heptane static worst-case execution time estimation tool. In Proceedings of the 17th International Workshop on Worst-Case Execution Time Analysis (WCET '17), pages 8:1-8:12, 2017. URL: https://doi.org/10.4230/OASIcs.WCET.2017.8.
  27. Mark Heene, Susan Hill, and Joseph Jelemensky. Queued serial peripheral interface for use in a data processing system, 1989. patent. Google Scholar
  28. N. Holsti, T. Langbacka, and S. Saarinen. Using a worst-case execution time tool for real-time verification of the DEBIE software. In Proceedings of the Data Systems in Aerospace Conference (DASIA '00), pages 1-6, 2000. Google Scholar
  29. N. Holsti and S. Saarinen. Status of the Bound-T WCET tool. In Proceedings of the 2nd International Workshop on Worst-Case Execution Time Analysis (WCET '02), pages 36-41, 2002. Google Scholar
  30. J.-M. Irazabal and S. Blozis. AN10216-01 I2C MANUAL, 2003. Google Scholar
  31. Ramkumar Jayaseelan, Tulika Mitra, and Xianfeng Li. Estimating the worst-case energy consumption of embedded software. In Proceedings of the 12th Real-Time and Embedded Technology and Applications Symposium (RTAS '06), pages 81-90, 2006. URL: https://doi.org/10.1109/RTAS.2006.17.
  32. Jetperch LLC. Joulescope JS220 User’s Guide Precision DC Energy Analyzer, 2022. Revision 1.3. URL: https://download.joulescope.com/products/JS220/JS220-K000/users_guide/.
  33. Daniel Kästner, Markus Pister, Simon Wegener, and Christian Ferdinand. TimeWeaver: A tool for hybrid worst-case execution time analysis. In Proceedings of the 19th International Workshop on Worst-Case Execution Time Analysis (WCET '19), pages 1:1-1:11, 2019. URL: https://doi.org/10.4230/OASIcs.WCET.2019.1.
  34. S. Kerrison and K. Eder. Energy modeling of software for a hardware multithreaded embedded microprocessor. ACM Transactions on Embedded Computing Systems (ACM TECS), 14(3):56, 2015. Google Scholar
  35. Raimund Kirner. The wcet analysis tool CalcWcet167. In Proceedings of the International Symposium On Leveraging Applications of Formal Methods, Verification and Validation (ISoLA '12), pages 158-172, 2012. URL: https://doi.org/10.1007/978-3-642-34032-1_17.
  36. Chang-Gun Lee, Hoosun Hahn, Yang-Min Seo, Sang Lyul Min, Rhan Ha, Seongsoo Hong, Chang Yun Park, Minsuk Lee, and Chong Sang Kim. Analysis of cache-related preemption delay in fixed-priority preemptive scheduling. IEEE Transactions on Computers, 47(6):700-713, 1998. URL: https://doi.org/10.1109/12.689649.
  37. S. Lee, A. Ermedahl, S. L. Min, and N. Chang. An accurate instruction-level energy consumption model for embedded RISC processors. SIGPLAN Notices, 36(8):1-10, 2001. Google Scholar
  38. Xianfeng Li, Yun Liang, Tulika Mitra, and Abhik Roychoudhury. Chronos: A timing analyzer for embedded software. Science of Computer Programming, 69(1):56-67, 2007. URL: https://doi.org/10.1016/j.scico.2007.01.014.
  39. B. Lisper. SWEET - a tool for WCET flow analysis. In Proceedings of the 6th International Symposium On Leveraging Applications of Formal Methods, Verification and Validation (ISoLA '14), pages 482-485, 2014. URL: https://doi.org/10.1007/978-3-662-45231-8_38.
  40. Dominique Méry, Bernhard Schätz, and Alan Wassyng. The pacemaker challenge: Developing certifiable medical devices (dagstuhl seminar 14062). Dagstuhl Reports, 4(2):17-37, 2014. URL: https://doi.org/10.4230/DagRep.4.2.17.
  41. MIPI Alliance, Inc. MIPI I3C & MIPI I3C Basic, 2018. Google Scholar
  42. S. Narayana, P. Huang, G. Giannopoulou, L. Thiele, and R. V. Prasad. Exploring energy saving for mixed-criticality systems on multi-cores. In Proceedings of the Real-Time and Embedded Technology and Applications Symposium (RTAS '16), pages 1-12, 2016. Google Scholar
  43. Mitra Nasri and Björn B. Brandenburg. Offline equivalence: A non-preemptive scheduling technique for resource-constrained embedded real-time systems (outstanding paper). In Proceedings of the Real-Time and Embedded Technology and Applications Symposium (RTAS '17), pages 75-86, 2017. URL: https://doi.org/10.1109/RTAS.2017.34.
  44. F. Nemer, H. Cassé, P. Sainrat, J.-P. Bahsoun, and M. De Michiel. PapaBench: A free real-time benchmark. In Proceedings of the 6th International Workshop on Worst-Case Execution Time Analysis (WCET '06), pages 1-6, 2006. Google Scholar
  45. S. Nikolaidis, N. Kavvadias, P. Neofotistos, K. Kosmatopoulos, T. Laopoulos, and L. Bisdounis. Instrumentation set-up for instruction level power modeling. In Integrated Circuit Design, pages 71-80, 2002. Google Scholar
  46. Santiago Pagani and Jian-Jia Chen. Energy efficient task partitioning based on the single frequency approximation scheme. In Proceedings of the 34th Real-Time Systems Symposium (RTSS '13), pages 308-318, 2013. Google Scholar
  47. Claire Pagetti, David Saussié, Romain Gratia, Eric Noulard, and Pierre Siron. The rosace case study: From simulink specification to multi/many-core execution. In Proceedings of the 19th Real-Time and Embedded Technology and Applications Symposium (RTAS '13), pages 309-318, 2014. URL: https://doi.org/10.1109/RTAS.2014.6926012.
  48. James Pallister, Steve Kerrison, Jeremy Morse, and Kerstin Eder. Data dependent energy modeling for worst case energy consumption analysis. In Proceedings of the 20th Workshop on Software and Compilers for Embedded Systems, pages 51-59, 2017. URL: https://doi.org/10.1145/3078659.3078666.
  49. Peter Puschner, Raimund Kirner, and Robert G Pettit. Towards composable timing for real-time programs. In Proceedings of the 1st International Workshop on Software Technologies for Future Dependable Distributed Systems (STFSSD '09), pages 1-5, 2009. URL: https://doi.org/10.1109/STFSSD.2009.26.
  50. Peter Puschner, Daniel Prokesch, Benedikt Huber, Jens Knoop, Stefan Hepp, and Gernot Gebhard. The t-crest approach of compiler and wcet-analysis integration. In Proceedings of the 16th IEEE International Symposium on Object/component/service-oriented Real-time distributed Computing (ISORC 2013), pages 1-8, 2013. URL: https://doi.org/10.1109/ISORC.2013.6913220.
  51. Phillip Raffeck, Johannes Maier, and Peter Wägemann. WoCA: Avoiding intermittent execution in embedded systems by worst-case analyses with device states. In Proceedings of the 25th ACM International Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES '24), 2024. URL: https://doi.org/10.1145/3652032.3657569.
  52. Real Time Engineers Ltd. The FreeRTOS reference manual: Api functions and configuration options v9.0.0, 2016. Google Scholar
  53. John Regehr and Usit Duongsaa. Preventing interrupt overload. In Proceedings of the 2005 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES '05), pages 50-58, 2005. URL: https://doi.org/10.1145/1065910.1065918.
  54. M. Rottleuthner, T. C. Schmidt, and M. Wahlisch. Dynamic clock reconfiguration for the constrained iot and its application to energy-efficient networking. In Proc. of the International Conference On Embedded Wireless Systems And Networks (EWSN '22), pages 168-179, 2023. Google Scholar
  55. Y. S. Shao and D. Brooks. Energy characterization and instruction-level energy model of Intel’s Xeon Phi processor. In Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED '13), pages 389-394, 2013. Google Scholar
  56. V. Sieh, R. Burlacu, T. Hönig, H. Janker, P. Raffeck, P. Wägemann, and W. Schröder-Preikschat. An end-to-end toolchain: From automated cost modeling to static WCET and WCEC analysis. In Proceedings of the 20th International Symposium on Real-Time Distributed Computing (ISORC '17), pages 1-10, 2017. URL: https://doi.org/10.1109/ISORC.2017.10.
  57. Philip Sparks. White paper: The economics of a trillion connected devices, 2017. Google Scholar
  58. Brinkley Sprunt, Lui Sha, and John Lehoczky. Aperiodic task scheduling for hard-real-time systems. Real-Time Systems, 1:27-60, 1989. URL: https://doi.org/10.1007/BF02341920.
  59. V. Tiwari and M. T.-C. Lee. Power analysis of a 32-bit embedded microcontroller. VLSI Design, 7(3):225-242, 1998. URL: https://doi.org/10.1155/1998/89432.
  60. D. Trilla, C. Hernandez, J. Abella, and F. J. Cazorla. Worst-case energy consumption: A new challenge for battery-powered critical devices. IEEE Transactions on Sustainable Computing, pages 1-8, 2019. URL: https://doi.org/10.1109/TSUSC.2019.2943142.
  61. Peter Wägemann, Christian Dietrich, Tobias Distler, Peter Ulbrich, and Wolfgang Schröder-Preikschat. Whole-system worst-case energy-consumption analysis for energy-constrained real-time systems. In Proceedings of the 30th Euromicro Conference on Real-Time Systems (ECRTS '18), volume 106, pages 24:1-24:25, 2018. URL: https://doi.org/10.4230/LIPIcs.ECRTS.2018.24.
  62. Peter Wägemann, Tobias Distler, Timo Hönig, Heiko Janker, Rüdiger Kapitza, and Wolfgang Schröder-Preikschat. Worst-case energy consumption analysis for energy-constrained embedded systems. In Proceedings of the 27th Euromicro Conference on Real-Time Systems (ECRTS '15), pages 105-114, 2015. URL: https://doi.org/10.1109/ECRTS.2015.17.
  63. Peter Wägemann, Tobias Distler, Heiko Janker, Phillip Raffeck, Volkmar Sieh, and Wolfgang Schröder-Preikschat. Operating energy-neutral real-time systems. ACM Transactions on Embedded Computing Systems (ACM TECS), 17(1):11:1-11:25, 2017. URL: https://doi.org/10.1145/3078631.
  64. Simon Wegener, Kris K. Nikov, Jose Nunez-Yanez, and Kerstin Eder. EnergyAnalyzer: Using static wcet analysis techniques to estimate the energy consumption of embedded applications. In Proceedings of the 21th International Workshop on Worst-Case Execution Time Analysis (WCET '23), pages 9:1-9:14, 2023. URL: https://doi.org/10.4230/OASIcs.WCET.2023.9.
  65. Ruibin Xu, Dakai Zhu, Cosmin Rusu, Rami Melhem, and Daniel Mossé. Energy-efficient policies for embedded clusters. ACM SIGPLAN Notices, 40(7):1-10, 2005. URL: https://doi.org/10.1145/1065910.1065912.
  66. C.-Y. Yang, J.-J. Chen, T.-W. Kuo, and L. Thiele. Energy reduction techniques for systems with non-dvs components. In Proceedings of the IEEE Conference on Emerging Technologies & Factory Automation (ETFA '09), pages 1-8, 2009. URL: https://doi.org/10.1109/ETFA.2009.5347153.
  67. Chuan-Yue Yang, Jian-Jia Chen, and Tei-Wei Kuo. Preemption control for energy-efficient task scheduling in systems with a dvs processor and non-dvs devices. In Proceedings of the 13th International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA '07), pages 293-300, 2007. URL: https://doi.org/10.1109/RTCSA.2007.56.
Questions / Remarks / Feedback
X

Feedback for Dagstuhl Publishing


Thanks for your feedback!

Feedback submitted

Could not send message

Please try again later or send an E-mail
© 2023-2024 Schloss Dagstuhl – LZI GmbH Imprint Privacy Contact