,
Rajit Manohar
,
Robert Soulé
Creative Commons Attribution 4.0 International license
In this paper, we propose a novel software/hardware design to improve I/O performance while maintaining existing POSIX-standard APIs. Our approach stands in contrast to existing kernel-bypass strategies that improve performance at the expense of abandoning familiar programming abstractions. Our key insight is that navigating the performance-functionality trade-off requires changes to the processor; it cannot be done without support of the CPU micro-architecture. Our design, called Accio, includes: dedicated hardware for interrupt management, a hardware assist for thread scheduling, tables in hardware that manage I/O state, and modifications to the operating system to support the new hardware. Our evaluation demonstrates that Accio saturates the bus bandwidth, reduces CPU usage by up to 66% compared to state-of-the-art kernel-bypass systems, and reduces latency to 1/12th of that of the Linux kernel, matching that of kernel-bypass systems.
@InProceedings{nazari_et_al:OASIcs.NINeS.2026.21,
author = {Nazari, Amirmohammad and Manohar, Rajit and Soul\'{e}, Robert},
title = {{Accio: Rethinking OS-Architecture Co-Design for Next-Gen I/O}},
booktitle = {1st New Ideas in Networked Systems (NINeS 2026)},
pages = {21:1--21:24},
series = {Open Access Series in Informatics (OASIcs)},
ISBN = {978-3-95977-414-7},
ISSN = {2190-6807},
year = {2026},
volume = {139},
editor = {Argyraki, Katerina and Panda, Aurojit},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
address = {Dagstuhl, Germany},
URL = {https://drops.dagstuhl.de/entities/document/10.4230/OASIcs.NINeS.2026.21},
URN = {urn:nbn:de:0030-drops-256063},
doi = {10.4230/OASIcs.NINeS.2026.21},
annote = {Keywords: Networks, Operating Systems, I/O Optimization}
}