DagSemProc.10281.9.pdf
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Low-Power Reconfigurable Architectures for High-Performance Mobile Nodes
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Dagstuhl Seminar Proceedings, Volume 10281
Series: Dagstuhl Seminar Proceedings (DagSemProc) - License:
Creative Commons Attribution 4.0 International license
- Publication Date: 2010-12-14
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Matthias Hanke, Tim Kranich, Mladen Berekovic, and Yannis Papaefstathiou. Low-Power Reconfigurable Architectures for High-Performance Mobile Nodes. In Dynamically Reconfigurable Architectures. Dagstuhl Seminar Proceedings, Volume 10281, pp. 1-7, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2010)
https://doi.org/10.4230/DagSemProc.10281.9
https://doi.org/10.4230/DagSemProc.10281.9
Abstract
Modern embedded systems have an emerging demand on high
performance and low power circuits. Traditionally special functional units for
each application are developed separately. These are plugged to a general
purpose processors to extend its instruction set making it an application specific
instruction set processor. As this strategy reaches its boundaries in area and
complexity reconfigurable architectures propose to be more flexible. Thus
combining both approaches to a reconfigurable application specific processor is
going to be the upcoming solution for future embedded systems.
Keywords
- Reconfiguration
- ASIP
- RASIP
- low power
- high performance
- video encoding
- encryption
- wireless sensor node
- mobile device
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