Parallelism through Digital Circuit Design

O'Donnell, John

doi:10.4230/DagSemProc.07361.4

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Parallelism through Digital Circuit Design

Author John O'Donnell

Part of: Volume: Dagstuhl Seminar Proceedings, Volume 7361
Part of: Series: Dagstuhl Seminar Proceedings (DagSemProc)
License: Creative Commons Attribution 4.0 International license
Publication Date: 2008-02-06

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DagSemProc.07361.4.pdf

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Document Identifiers

DOI: 10.4230/DagSemProc.07361.4
URN: urn:nbn:de:0030-drops-13724

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Keywords

Circuit parallelism
data parallelism
FPGA

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Abstract

Two ways to exploit chips with a very large number of transistors are
multicore processors and programmable logic chips.  Some data parallel
algorithms can be executed efficiently on ordinary parallel computers,
including multicores.  A class of data parallel algorithms is
identified which have characteristics that make implementation on
multiprocessors inefficient, but they are well suited for direct
design as digital circuits.  This leads to a programming model called
circuit parallelism.  The characteristics of circuit parallel
algorithms are discussed, and a prototype system for supporting them
is described.

Cite As Get BibTex

John O'Donnell. Parallelism through Digital Circuit Design. In Programming Models for Ubiquitous Parallelism. Dagstuhl Seminar Proceedings, Volume 7361, pp. 1-9, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2008) https://doi.org/10.4230/DagSemProc.07361.4

Author Details

John O'Donnell

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