Hanke, Matthias ;
Kranich, Tim ;
Berekovic, Mladen ;
Papaefstathiou, Yannis
Low-Power Reconfigurable Architectures for High-Performance Mobile Nodes
Abstract
Modern embedded systems have an emerging demand on high
performance and low power circuits. Traditionally special functional units for
each application are developed separately. These are plugged to a general
purpose processors to extend its instruction set making it an application specific
instruction set processor. As this strategy reaches its boundaries in area and
complexity reconfigurable architectures propose to be more flexible. Thus
combining both approaches to a reconfigurable application specific processor is
going to be the upcoming solution for future embedded systems.
BibTeX - Entry
@InProceedings{hanke_et_al:DSP:2010:2837,
author = {Matthias Hanke and Tim Kranich and Mladen Berekovic and Yannis Papaefstathiou},
title = {{Low-Power Reconfigurable Architectures for High-Performance Mobile Nodes}},
booktitle = {Dynamically Reconfigurable Architectures},
year = {2010},
editor = {Peter M. Athanas and J{\"u}rgen Becker and J{\"u}rgen Teich and Ingrid Verbauwhede},
number = {10281},
series = {Dagstuhl Seminar Proceedings},
ISSN = {1862-4405},
publisher = {Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik, Germany},
address = {Dagstuhl, Germany},
URL = {http://drops.dagstuhl.de/opus/volltexte/2010/2837},
annote = {Keywords: Reconfiguration, ASIP, RASIP, low power, high performance, video encoding, encryption, wireless sensor node, mobile device}
}
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Keywords: |
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Reconfiguration, ASIP, RASIP, low power, high performance, video encoding, encryption, wireless sensor node, mobile device |
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Seminar: |
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10281 - Dynamically Reconfigurable Architectures
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Issue date: |
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2010 |
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Date of publication: |
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14.12.2010 |
14.12.2010
