OASIcs.PPES.2011.11.pdf
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Towards a Time-predictable Dual-Issue Microprocessor: The Patmos Approach
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Bringing Theory to Practice: Predictability and Performance in Embedded Systems (PPES 2011)
Series: Open Access Series in Informatics (OASIcs) - License:
Creative Commons Attribution-NoDerivs 3.0 Unported license
- Publication Date: 2011-03-21
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Martin Schoeberl, Pascal Schleuniger, Wolfgang Puffitsch, Florian Brandner, and Christian W. Probst. Towards a Time-predictable Dual-Issue Microprocessor: The Patmos Approach. In Bringing Theory to Practice: Predictability and Performance in Embedded Systems. Open Access Series in Informatics (OASIcs), Volume 18, pp. 11-21, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2011)
https://doi.org/10.4230/OASIcs.PPES.2011.11
Abstract
Current processors are optimized for average case performance, often leading to a high worst-case execution time (WCET). Many architectural features that increase the average case performance are hard to be modeled for the WCET analysis. In this paper we present Patmos, a processor optimized for low WCET bounds rather than high average case performance. Patmos is a dual-issue, statically scheduled RISC processor. The instruction cache is organized as a method cache and the data cache is organized as a split cache in order to simplify the cache WCET analysis. To fill the dual-issue pipeline with enough useful instructions, Patmos relies on a customized compiler. The compiler also plays a central role in optimizing the application for the WCET instead of average case performance.
Subject Classification
Keywords
- Time-predictable architecture
- WCET analysis
- WCET-aware compilation
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