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Lower Bounds for (Non-Monotone) Comparator Circuits

Authors Anna Gál, Robert Robere

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Author Details

Anna Gál
  • University of Texas at Austin, Austin TX, United States of America
Robert Robere
  • Institute for Advanced Study, Princeton NJ, United States of America

Funding

  • Robere, Robert: Funding provided by an NSERC Postdoctoral Fellowship and the Charles Simonyi Endowment.

Acknowledgements

Some of this work was done while the authors were visiting the Simons Institute for the Theory of Computing in Berkeley, and while R.R. was at DIMACS.

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Anna Gál and Robert Robere. Lower Bounds for (Non-Monotone) Comparator Circuits. In 11th Innovations in Theoretical Computer Science Conference (ITCS 2020). Leibniz International Proceedings in Informatics (LIPIcs), Volume 151, pp. 58:1-58:13, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2020) https://doi.org/10.4230/LIPIcs.ITCS.2020.58

Abstract

Comparator circuits are a natural circuit model for studying the concept of bounded fan-out computations, which intuitively corresponds to whether or not a computational model can make "copies" of intermediate computational steps. Comparator circuits are believed to be weaker than general Boolean circuits, but they can simulate Branching Programs and Boolean formulas. In this paper we prove the first superlinear lower bounds in the general (non-monotone) version of this model for an explicitly defined function. More precisely, we prove that the n-bit Element Distinctness function requires Ω((n/ log n)^(3/2)) size comparator circuits.

Subject Classification

ACM Subject Classification
  • Theory of computation → Circuit complexity
Keywords
  • comparator circuits
  • circuit complexity
  • Nechiporuk
  • lower bounds

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