Light Reading: Optimizing Reader/Writer Locking for Read-Dominant Real-Time Workloads

Authors Catherine E. Nemitz, Shai Caspin, James H. Anderson, Bryan C. Ward



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Author Details

Catherine E. Nemitz
  • University of North Carolina at Chapel Hill, NC, USA
Shai Caspin
  • University of North Carolina at Chapel Hill, NC, USA
James H. Anderson
  • University of North Carolina at Chapel Hill, NC, USA
Bryan C. Ward
  • MIT Lincoln Laboratory, Lexington, MA, USA

Acknowledgements

DISTRIBUTION STATEMENT A. Approved for public release. Distribution is unlimited. This material is based upon work supported by the Under Secretary of Defense for Research and Engineering under Air Force Contract No. FA8702-15-D-0001. Any opinions, findings, conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the views of the Under Secretary of Defense for Research and Engineering. © 2021 Massachusetts Institute of Technology. Delivered to the U.S. Government with Unlimited Rights, as defined in DFARS Part 252.227-7013 or 7014 (Feb 2014). Notwithstanding any copyright notice, U.S. Government rights in this work are defined by DFARS 252.227-7013 or DFARS 252.227-7014 as detailed above. Use of this work other than as specifically authorized by the U.S. Government may violate any copyrights that exist in this work.

Cite AsGet BibTex

Catherine E. Nemitz, Shai Caspin, James H. Anderson, and Bryan C. Ward. Light Reading: Optimizing Reader/Writer Locking for Read-Dominant Real-Time Workloads. In 33rd Euromicro Conference on Real-Time Systems (ECRTS 2021). Leibniz International Proceedings in Informatics (LIPIcs), Volume 196, pp. 6:1-6:22, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2021)
https://doi.org/10.4230/LIPIcs.ECRTS.2021.6

Abstract

This paper is directed at reader/writer locking for read-dominant real-time workloads. It is shown that state-of-the-art real-time reader/writer locking protocols are subject to performance limitations when reads dominate, and that existing schedulability analysis fails to leverage the sparsity of writes in this case. A new reader/writer locking-protocol implementation and new inflation-free schedulability analysis are proposed to address these problems. Overhead evaluations of the new implementation show a decrease in overheads of up to 70% over previous implementations, leading to throughput for read operations increasing by up to 450%. Schedulability experiments are presented that show that the analysis results in schedulability improvements of up to 156.8% compared to the existing state-of-the-art approach.

Subject Classification

ACM Subject Classification
  • Computer systems organization → Real-time system architecture
  • Computing methodologies → Shared memory algorithms
Keywords
  • Reader/writer
  • real-time
  • synchronization
  • spinlock
  • RMR complexity

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References

  1. GLPK (GNU Linear Programming Kit). URL: https://www.gnu.org/software/glpk/.
  2. LITMUS^RT home page. URL: http://www.litmus-rt.org/.
  3. SchedCAT: Schedulability test collection and toolkit. https://github.com/brandenburg/schedcat, 2020. Accessed: 2020-06-21.
  4. S. Altmeyer, R. Douma, W. Lunniss, and R. Davis. Evaluation of cache partitioning for hard real-time systems. In Proceedings of the 26th Euromicro Conference on Real-Time Systems, 2014. Google Scholar
  5. S. Baruah. Resource sharing in EDF-scheduled systems: A closer look. In Proceedings of the 27th IEEE International Real-Time Systems Symposium, 2006. Google Scholar
  6. A. Bastoni, B. Brandenburg, and J. Anderson. Cache-related preemption and migration delays: Empirical approximation and impact on schedulability. Proceedings of the 6th Workshop on Operating Systems Platforms for Embedded Real-Time applications, 2010. Google Scholar
  7. V. Bhatt and P. Jayanti. Constant RMR solutions to reader writer synchronization. In Proceedings of the 29th ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing, 2010. Google Scholar
  8. V. Bhatt and P. Jayanti. Specification and constant RMR algorithm for phase-fair reader-writer lock. In Proceedings of the 12th International Conference on Distributed Computing and Networking, 2011. Google Scholar
  9. A. Biondi and B. Brandenburg. Lightweight real-time synchronization under P-EDF on symmetric and asymmetric multiprocessors. In Proceedings of the 28th Euromicro Conference on Real-Time Systems, 2016. Google Scholar
  10. S. Bradley, A. Hax, and T. Magnanti. Applied mathematical programming, Chapter 9 (Addison-Wesley, 1977). http://web.mit.edu/15.053/www/AMP-Chapter-09.pdf, 2021.
  11. B. Brandenburg. Scheduling and Locking in Multiprocessor Real-Time Operating Systems. PhD thesis, University of North Carolina, Chapel Hill, NC, 2011. Google Scholar
  12. B. Brandenburg and J. Anderson. Spin-based reader-writer synchronization for multiprocessor real-time systems. Real-Time Systems, 46(1):25-87, 2010. Google Scholar
  13. B. Brandenburg and J. Anderson. Real-time resource-sharing under clustered scheduling: Mutex, reader-writer, and k-exclusion locks. In Proceedings of the 9th ACM International Conference on Embedded Software, 2011. Google Scholar
  14. M. Campoy, A.P. Ivars, and J.V. Busquets-Mataix. Static use of locking caches in multitask preemptive real-time systems. In IEEE/IEE Real-Time Embedded Systems Workshop, 2001. Google Scholar
  15. M. Chisholm, B. Ward, N. Kim, and J. Anderson. Cache sharing and isolation tradeoffs in multicore mixed-criticality systems. In Proceedings of the 36th IEEE International Real-Time Systems Symposium, December 2015. Google Scholar
  16. P. Courtois, F. Heymans, and D. Parnas. Concurrent control with readers and writers. Communications of the ACM, 14(10):667-668, 1971. Google Scholar
  17. James R Goodman. Using cache memory to reduce processor-memory traffic. In Proceedings of the 10th Annual International Symposium on Computer Architecture, 1983. Google Scholar
  18. J. Hennessy and D. Patterson. Computer architecture: a quantitative approach. Elsevier, 2011. Google Scholar
  19. M. Herlihy and J. Wing. Linearizability: A correctness condition for concurrent objects. ACM Transactions on Programming Languages and Systems, 12(3):463-492, 1990. Google Scholar
  20. J. Herter, P. Backes, F. Haupenthal, and J. Reineke. CAMA: A predictable cache-aware memory allocator. In Proceedings of the 23rd Euromicro Conference on Real-Time Systems, 2011. Google Scholar
  21. H. Kim, A. Kandhalu, and R. Rajkumar. A coordinated approach for practical OS-level cache management in multi-core real-time systems. In Proceedings of the 25th Euromicro Conference on Real-Time Systems, 2013. Google Scholar
  22. D. Kirk and J. Strosnider. SMART (strategic memory allocation for real-time) cache design using the MIPS R3000. In Proceedings of the 11th Real-Time Systems Symposium, 1990. Google Scholar
  23. Y. Lev, V. Luchangco, and M. Olszewski. Scalable reader-writer locks. In Proceedings of the 21st Annual Symposium on Parallelism in Algorithms and Architectures, 2009. Google Scholar
  24. P. McKenney. Exploiting Deferred Destruction: An Analysis of Read-Copy-Update Techniques in Operating System Kernels. PhD thesis, OGI School of Science and Engineering at Oregon Health and Sciences University, Beaverton, OR, 2004. Google Scholar
  25. J. Mellor-Crummey and M. Scott. Scalable reader-writer synchronization for shared-memory multiprocessors. In Proceedings of the 3rd ACM Symposium on Principles and Practice of Parallel Programming, 1991. Google Scholar
  26. L. Thiele, S. Chakraborty, and M. Naedele. Real-time calculus for scheduling hard real-time systems. In Proceedings of the IEEE International Symposium on Circuits and Systems, 2000. Google Scholar
  27. B. Ward. Relaxing resource-sharing constraints for improved hardware management and schedulability. In Proceedings of the 36th International IEEE Real-Time Systems Symposium, 2015. Google Scholar
  28. B. Ward and J. Anderson. Multi-resource real-time reader/writer locks for multiprocessors. In Proceedings of the 28th IEEE International Parallel and Distributed Processing Symposium, 2014. Google Scholar
  29. B. Ward, J. Herman, C. Kenna, and J. Anderson. Making shared caches more predictable on multicore platforms. In Proceedings of the 25th Euromicro Conference on Real-Time Systems, 2013. Google Scholar
  30. A. Wieder and B. Brandenburg. On spin locks in AUTOSAR: Blocking analysis of FIFO, unordered, and priority-ordered spin locks. In Proceedings of the 34th IEEE International Real-Time Systems Symposium, 2013. Google Scholar
  31. M. Xu, L. T. X. Phan, H.-Y. Choi, and I. Lee. Analysis and implementation of global preemptive fixed-priority scheduling with dynamic cache allocation. In Proceedings of the 21st IEEE Real-Time and Embedded Technology and Applications Symposium, 2016. Google Scholar
  32. M. Xu, L. T. X. Phan, H.-Y. Choi, and I. Lee. vCAT: Dynamic cache management using CAT virtualization. In Proceedings of the 22nd IEEE Real-Time and Embedded Technology and Applications Symposium, 2017. Google Scholar
  33. J.-H. Yang and J. Anderson. A fast, scalable mutual exclusion algorithm. Distributed Computing, 9(1):51-60, August 1995. Google Scholar
  34. H. Yun, R. Mancuso, Z. Wu, and R. Pellizzoni. PALLOC: DRAM bank-aware memory allocator for performance isolation on multicore platforms. In Proceedings of the 19th IEEE Real-Time and Embedded Technology and Applications Symposium, 2014. Google Scholar
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