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Small Hazard-Free Transducers

Authors Johannes Bund , Christoph Lenzen, Moti Medina

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Author Details

Johannes Bund
  • CISPA Helmholtz Center for Information Security, Saarbrücken, Germany
Christoph Lenzen
  • CISPA Helmholtz Center for Information Security, Saarbrücken, Germany
Moti Medina
  • Faculty of Engineering, Bar-Ilan University, Ramat Gan, Israel

Funding

  • Bund, Johannes: The author has received support from the European Research Council (ERC) under the European Union’s Horizon 2020 research and innovation programme (grant agreement 716562).
  • Lenzen, Christoph: The author has received support from the European Research Council (ERC) under the European Union’s Horizon 2020 research and innovation programme (grant agreement 716562).
  • Medina, Moti: The author was supported by the Israel Science Foundation under Grant 867/19.

Cite As Get BibTex

Johannes Bund, Christoph Lenzen, and Moti Medina. Small Hazard-Free Transducers. In 13th Innovations in Theoretical Computer Science Conference (ITCS 2022). Leibniz International Proceedings in Informatics (LIPIcs), Volume 215, pp. 32:1-32:24, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2022) https://doi.org/10.4230/LIPIcs.ITCS.2022.32

Abstract

Ikenmeyer et al. (JACM'19) proved an unconditional exponential separation between the hazard-free complexity and (standard) circuit complexity of explicit functions. This raises the question: which classes of functions permit efficient hazard-free circuits?
In this work, we prove that circuit implementations of transducers with small state space are such a class. A transducer is a finite state machine that transcribes, symbol by symbol, an input string of length n into an output string of length n. We present a construction that transforms any function arising from a transducer into an efficient circuit of size 𝒪(n) computing the hazard-free extension of the function. More precisely, given a transducer with s states, receiving n input symbols encoded by l bits, and computing n output symbols encoded by m bits, the transducer has a hazard-free circuit of size n*m*2^{𝒪(s+𝓁)} and depth 𝒪(s*log(n) + 𝓁); in particular, if s, 𝓁,m ∈ 𝒪(1), size and depth are asymptotically optimal. In light of the strong hardness results by Ikenmeyer et al. (JACM'19), we consider this a surprising result.

Subject Classification

ACM Subject Classification
  • Hardware → Fault tolerance
  • Theory of computation → Circuit complexity
Keywords
  • Hazard-Freeness
  • Parallel Prefix Computation
  • Finite State Transducers

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References

  1. Noga Alon and Ravi B. Boppana. The Monotone Circuit Complexity of Boolean Functions. Combinatorica, 7(1):1-22, 1987. Google Scholar
  2. J. Brzozowski, Z. Esik, and Y. Iland. Algebras for Hazard Detection. In Proc. 31st International Symposium on Multiple-Valued Logic, 2001. Google Scholar
  3. J. Bund, C. Lenzen, and M. Medina. Optimal Metastability-Containing Sorting via Parallel Prefix Computation. Trans. on Computers, 2019. Google Scholar
  4. Johannes Bund, Christoph Lenzen, and Moti Medina. Small hazard-free transducers. arXiv preprint arXiv:1811.12369, 2018. Google Scholar
  5. Stephan Friedrichs, Matthias Függer, and Christoph Lenzen. Metastability-Containing Circuits. IEEE Transactions on Computers, 67, 2018. Google Scholar
  6. M. Goto. Application of logical mathematics to the theory of relay networks (in Japanese). J. Inst. Elec. Eng. of Japan, 64(726):125-130, 1949. Google Scholar
  7. Ronald L Graham, Donald E Knuth, and Oren Patashnik. Concrete Mathematics: A Foundation for Computer Science. Addison-Welsey Publishing Company, 2nd edition, 1994. Google Scholar
  8. W. Hu, J. Oberg, A. Irturk, M. Tiwari, T. Sherwood, D. Mu, and R. Kastner. On the Complexity of Generating Gate Level Information Flow Tracking Logic. IEEE Transactions on Information Forensics and Security, 7(3):1067-1080, 2012. Google Scholar
  9. David A. Huffman. The Design and Use of Hazard-Free Switching Networks. Journal of the ACM, 4(1):47-62, 1957. Google Scholar
  10. C. Ikenmeyer, B. Komarath, C. Lenzen, V. Lysikov, A. Mokhov, and K. Sreenivasaiah. On the complexity of hazard-free circuits. Journal of the ACM, 66(4):25:1-25:20, 2019. Google Scholar
  11. Stasys Jukna. Notes on hazard-free circuits. SIAM Journal on Discrete Mathematics, 35(2):770-787, 2021. Google Scholar
  12. David J. Kinniment. Synchronization and Arbitration in Digital Systems. Wiley, 2008. Google Scholar
  13. Stephen Cole Kleene. Introduction to Metamathematics. North Holland, 1952. Google Scholar
  14. Richard E Ladner and Michael J Fischer. Parallel Prefix Computation. Journal of the ACM (JACM), 27(4):831-838, 1980. Google Scholar
  15. Leonard Marino. General Theory of Metastable Operation. IEEE Transactions on Computers, C-30(2):107-115, 1981. Google Scholar
  16. Leonard R. Marino. The Effect of Asynchronous Inputs on Sequential Network Reliability. IEEE Transactions on computers, 26(11):1082-1090, 1977. Google Scholar
  17. George H Mealy. A method for synthesizing sequential circuits. The Bell System Technical Journal, 34(5):1045-1079, 1955. Google Scholar
  18. K. Mehlhorn and Z. Galil. Monotone Switching Circuits and Boolean Matrix Product. Computing, 16(1):99-111, March 1976. Google Scholar
  19. Michael S. Paterson. Complexity of Monotone Networks for Boolean Matrix Product. Theoretical Computer Science, 1(1):13-20, 1975. Google Scholar
  20. Miroslav Pechoucek. Anomalous Response Times of Input Synchronizers. IEEE Transactions on Computers, 100(2):133-139, 1976. Google Scholar
  21. Michael Sipser. Introduction to the Theory of Computation. Cengage Learning, third edition, 2012. Google Scholar
  22. M. J. Stucki and J. R. Cox. Synchronization Strategies. In Proceedings of the Caltech Conference On Very Large Scale Integration, pages 375-393, 1979. Google Scholar
  23. Earl E. Swartzlander and Carl E. Lemonds, editors. Computer Arithmetic, volume I-III. World Scientific Publishing Co, 2015. Google Scholar
  24. G. Tarawneh and A. Yakovlev. An RTL Method for Hiding Clock Domain Crossing Latency. In Electronics, Circuits, and Systems (ICECS), pages 540-543, 2012. Google Scholar
  25. Ghaith Tarawneh, Alex Yakovlev, and Terrence S. T. Mak. Eliminating Synchronization Latency Using Sequenced Latching. IEEE Transactions on VLSI Systems, 22(2):408-419, 2014. Google Scholar
  26. É. Tardos. The Gap between Monotone and Non-monotone Circuit Complexity is Exponential. Combinatorica, 8(1):141-142, 1988. Google Scholar
  27. Mohit Tiwari, Hassan M.G. Wassel, Bita Mazloom, Shashidhar Mysore, Frederic T. Chong, and Timothy Sherwood. Complete Information Flow Tracking from the Gates Up. SIGARCH Comput. Archit. News, 37(1):109-120, 2009. Google Scholar
  28. E. G. Wormald. A Note on Synchronizer or Interlock Maloperation. IEEE Transactions on Computers, C-26(3):317-318, 1977. Google Scholar
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