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DOI: 10.4230/LIPIcs.ECRTS.2017.5

VCDC: The Virtualized Complicated Device Controller

Authors: Zhe Jiang and Neil Audsley

Published in: LIPIcs, Volume 76, 29th Euromicro Conference on Real-Time Systems (ECRTS 2017)

Abstract

I/O virtualization enables time and space multiplexing of I/O devices, by mapping multiple logical I/O devices upon a smaller number of physical devices. However, due to the existence of additional virtualization layers, requesting an I/O from a guest virtual machine requires complicated sequences of operations. This leads to I/O performance losses, and makes precise timing of I/O operations unpredictable. This paper proposes a hardware I/O virtualization system, termed the Virtualized Complicated Device Controller (VCDC). This I/O system allows user applications to access and operate I/O devices directly from guest VMs, and bypasses the guest OS, the Virtual Machine Monitor (VMM) and low layer I/O drivers. We show that the VCDC efficiently reduces the software overhead and enhances the I/O performance and timing predictability. Furthermore, VCDC also exhibits good scalability that can handle I/O requests from variable number of CPUs in a system.

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Zhe Jiang and Neil Audsley. VCDC: The Virtualized Complicated Device Controller. In 29th Euromicro Conference on Real-Time Systems (ECRTS 2017). Leibniz International Proceedings in Informatics (LIPIcs), Volume 76, pp. 5:1-5:20, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2017)

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@InProceedings{jiang_et_al:LIPIcs.ECRTS.2017.5,
  author =	{Jiang, Zhe and Audsley, Neil},
  title =	{{VCDC: The Virtualized Complicated Device Controller}},
  booktitle =	{29th Euromicro Conference on Real-Time Systems (ECRTS 2017)},
  pages =	{5:1--5:20},
  series =	{Leibniz International Proceedings in Informatics (LIPIcs)},
  ISBN =	{978-3-95977-037-8},
  ISSN =	{1868-8969},
  year =	{2017},
  volume =	{76},
  editor =	{Bertogna, Marko},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops.dagstuhl.de/entities/document/10.4230/LIPIcs.ECRTS.2017.5},
  URN =		{urn:nbn:de:0030-drops-71501},
  doi =		{10.4230/LIPIcs.ECRTS.2017.5},
  annote =	{Keywords: Many-core System, I/O Virtualization, Real-time I/O, Hardware Manager}
}

Document

DOI: 10.4230/OASIcs.WCET.2008.1666

Traces as a Solution to Pessimism and Modeling Costs in WCET Analysis

Authors: Jack Whitham and Neil Audsley

Published in: OASIcs, Volume 8, 8th International Workshop on Worst-Case Execution Time Analysis (WCET'08) (2008)

Abstract

WCET analysis models for superscalar out-of-order CPUs generally need to be pessimistic in order to account for a wide range of possible dynamic behavior. CPU hardware modifications could be used to constrain operations to known execution paths called traces, permitting exploitation of instruction level parallelism with guaranteed timing. Previous implementations of traces have used microcode to constrain operations, but other possibilities exist. A new implementation strategy (virtual traces) is introduced here. In this paper the benefits and costs of traces are discussed. Advantages of traces include a reduction in pessimism in WCET analysis, with the need to accurately model CPU internals removed. Disadvantages of traces include a reduction of peak throughput of the CPU, a need for deterministic memory and a potential increase in the complexity of WCET models.

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Jack Whitham and Neil Audsley. Traces as a Solution to Pessimism and Modeling Costs in WCET Analysis. In 8th International Workshop on Worst-Case Execution Time Analysis (WCET'08). Open Access Series in Informatics (OASIcs), Volume 8, pp. 1-8, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2008)

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@InProceedings{whitham_et_al:OASIcs.WCET.2008.1666,
  author =	{Whitham, Jack and Audsley, Neil},
  title =	{{Traces as a Solution to Pessimism and Modeling Costs in WCET Analysis}},
  booktitle =	{8th International Workshop on Worst-Case Execution Time Analysis (WCET'08)},
  pages =	{1--8},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-939897-10-1},
  ISSN =	{2190-6807},
  year =	{2008},
  volume =	{8},
  editor =	{Kirner, Raimund},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops.dagstuhl.de/entities/document/10.4230/OASIcs.WCET.2008.1666},
  URN =		{urn:nbn:de:0030-drops-16666},
  doi =		{10.4230/OASIcs.WCET.2008.1666},
  annote =	{Keywords: WCET superscalar cpu virtual traces}
}

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Documents authored by Audsley, Neil

VCDC: The Virtualized Complicated Device Controller

Abstract

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Traces as a Solution to Pessimism and Modeling Costs in WCET Analysis

Abstract

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