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Documents authored by Deverge, Jean-François


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Safe measurement-based WCET estimation

Authors: Jean-François Deverge and Isabelle Puaut

Published in: OASIcs, Volume 1, 5th International Workshop on Worst-Case Execution Time Analysis (WCET'05) (2007)


Abstract
This paper explores the issues to be addressed to provide safe worst-case execution time (WCET) estimation methods based on measurements. We suggest to use structural testing for the exhaustive exploration of paths in a program. Since test data generation is in general too complex to be used in practice for most real-size programs, we propose to generate test data for program segments only, using program clustering. Moreover, to be able to combine execution time of program segments and to obtain the WCET of the whole program, we advocate the use of compiler techniques to reduce (ideally eliminate) the timing variability of program segments and to make the time of program segments independent from one another.

Cite as

Jean-François Deverge and Isabelle Puaut. Safe measurement-based WCET estimation. In 5th International Workshop on Worst-Case Execution Time Analysis (WCET'05). Open Access Series in Informatics (OASIcs), Volume 1, pp. 13-16, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2007)


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@InProceedings{deverge_et_al:OASIcs.WCET.2005.808,
  author =	{Deverge, Jean-Fran\c{c}ois and Puaut, Isabelle},
  title =	{{Safe measurement-based WCET estimation}},
  booktitle =	{5th International Workshop on Worst-Case Execution Time Analysis (WCET'05)},
  pages =	{13--16},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-939897-24-8},
  ISSN =	{2190-6807},
  year =	{2007},
  volume =	{1},
  editor =	{Wilhelm, Reinhard},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops.dagstuhl.de/entities/document/10.4230/OASIcs.WCET.2005.808},
  URN =		{urn:nbn:de:0030-drops-8089},
  doi =		{10.4230/OASIcs.WCET.2005.808},
  annote =	{Keywords: Real-Time, Timing Analysis, Test-Case generation, Processor Architecture}
}
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