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Towards Comparing the Robustness of Synchronous and Asynchronous Circuits by Fault Injection

Authors: Marcus Jeitler and Jakob Lechner

Published in: OASIcs, Volume 13, Annual Doctoral Workshop on Mathematical and Engineering Methods in Computer Science (MEMICS'09) (2009)


Abstract
As transient error rates are growing due to smaller feature sizes, designing reliable synchronous circuits becomes increasingly challenging. Asynchronous logic design constitutes a promising alternative with respect to robustness and stability. In particular, delay-insensitive asynchronous circuits provide interesting properties, like an inherent resilience to delay-faults.

Cite as

Marcus Jeitler and Jakob Lechner. Towards Comparing the Robustness of Synchronous and Asynchronous Circuits by Fault Injection. In Annual Doctoral Workshop on Mathematical and Engineering Methods in Computer Science (MEMICS'09). Open Access Series in Informatics (OASIcs), Volume 13, pp. 96-105, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2009)


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@InProceedings{jeitler_et_al:OASIcs:2009:DROPS.MEMICS.2009.2352,
  author =	{Jeitler, Marcus and Lechner, Jakob},
  title =	{{Towards Comparing the Robustness of Synchronous and Asynchronous Circuits by Fault Injection}},
  booktitle =	{Annual Doctoral Workshop on Mathematical and Engineering Methods in Computer Science (MEMICS'09)},
  pages =	{96--105},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-939897-15-6},
  ISSN =	{2190-6807},
  year =	{2009},
  volume =	{13},
  editor =	{Hlinen\'{y}, Petr and Maty\'{a}\v{s}, V\'{a}clav and Vojnar, Tom\'{a}\v{s}},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops.dagstuhl.de/entities/document/10.4230/DROPS.MEMICS.2009.2352},
  URN =		{urn:nbn:de:0030-drops-23529},
  doi =		{10.4230/DROPS.MEMICS.2009.2352},
  annote =	{Keywords: Four State Logic, Asynchronous Design, Fault Injection, Fault Tolerance}
}
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