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Parallelism through Digital Circuit Design

Authors: John O'Donnell

Published in: Dagstuhl Seminar Proceedings, Volume 7361, Programming Models for Ubiquitous Parallelism (2008)

Abstract

Two ways to exploit chips with a very large number of transistors are multicore processors and programmable logic chips. Some data parallel algorithms can be executed efficiently on ordinary parallel computers, including multicores. A class of data parallel algorithms is identified which have characteristics that make implementation on multiprocessors inefficient, but they are well suited for direct design as digital circuits. This leads to a programming model called circuit parallelism. The characteristics of circuit parallel algorithms are discussed, and a prototype system for supporting them is described.

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John O'Donnell. Parallelism through Digital Circuit Design. In Programming Models for Ubiquitous Parallelism. Dagstuhl Seminar Proceedings, Volume 7361, pp. 1-9, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2008)

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@InProceedings{odonnell:DagSemProc.07361.4,
  author =	{O'Donnell, John},
  title =	{{Parallelism through Digital Circuit Design}},
  booktitle =	{Programming Models for Ubiquitous Parallelism},
  pages =	{1--9},
  series =	{Dagstuhl Seminar Proceedings (DagSemProc)},
  ISSN =	{1862-4405},
  year =	{2008},
  volume =	{7361},
  editor =	{Albert Cohen and Mar{\'\i}a J. Garzar\'{a}n and Christian Lengauer and Samuel P. Midkiff},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops.dagstuhl.de/entities/document/10.4230/DagSemProc.07361.4},
  URN =		{urn:nbn:de:0030-drops-13724},
  doi =		{10.4230/DagSemProc.07361.4},
  annote =	{Keywords: Circuit parallelism, data parallelism, FPGA}
}

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Parallelism through Digital Circuit Design

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