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Documents authored by Weiss, Alexander

Document
Short Paper
DOI: 10.4230/OASIcs.DX.2024.19
Achieving Complete Structural Test Coverage in Embedded Systems Using Trace-Based Monitoring (Short Paper)

Authors: Alexander Weiss, Albert Schulz, Martin Heininger, Martin Sachenbacher, and Martin Leucker

Published in: OASIcs, Volume 125, 35th International Conference on Principles of Diagnosis and Resilient Systems (DX 2024)

Abstract
This paper presents a systematic approach to achieving, in a well-defined sense, 100% structural test coverage for large embedded software projects. In embedded systems, high code coverage is a critical part of the testing process to ensure that the system works correctly. Measuring code coverage provides insight into the effectiveness of the testing process, the quality of the software, and can help identify untested or partially tested areas of the code. Traditionally, coverage is often measured when unit tests are executed. The proposed approach instead uses integration tests as the starting point for determining test completeness. Measuring code coverage at the integration test level in embedded systems can be challenging due to the limitations of software instrumentation (additional memory requirements and additional CPU load). To overcome these limitations, embedded trace technology is used to measure code coverage continuously and non-intrusively. The use of these techniques will help to increase the reliability of embedded software and reduce the likelihood of missed integration tests, missed high-level requirements, and undetected software defects.
Cite as

Alexander Weiss, Albert Schulz, Martin Heininger, Martin Sachenbacher, and Martin Leucker. Achieving Complete Structural Test Coverage in Embedded Systems Using Trace-Based Monitoring (Short Paper). In 35th International Conference on Principles of Diagnosis and Resilient Systems (DX 2024). Open Access Series in Informatics (OASIcs), Volume 125, pp. 19:1-19:12, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2024)

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@InProceedings{weiss_et_al:OASIcs.DX.2024.19,
  author =	{Weiss, Alexander and Schulz, Albert and Heininger, Martin and Sachenbacher, Martin and Leucker, Martin},
  title =	{{Achieving Complete Structural Test Coverage in Embedded Systems Using Trace-Based Monitoring}},
  booktitle =	{35th International Conference on Principles of Diagnosis and Resilient Systems (DX 2024)},
  pages =	{19:1--19:12},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-95977-356-0},
  ISSN =	{2190-6807},
  year =	{2024},
  volume =	{125},
  editor =	{Pill, Ingo and Natan, Avraham and Wotawa, Franz},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops.dagstuhl.de/entities/document/10.4230/OASIcs.DX.2024.19},
  URN =		{urn:nbn:de:0030-drops-221115},
  doi =		{10.4230/OASIcs.DX.2024.19},
  annote =	{Keywords: structural tests, integration tests, code coverage, embedded trace}
}
Document
DOI: 10.4230/OASIcs.WCET.2016.4
Continuous Non-Intrusive Hybrid WCET Estimation Using Waypoint Graphs

Authors: Boris Dreyer, Christian Hochberger, Alexander Lange, Simon Wegener, and Alexander Weiss

Published in: OASIcs, Volume 55, 16th International Workshop on Worst-Case Execution Time Analysis (WCET 2016)

Abstract
Traditionally, the Worst-Case Execution Time (WCET) of Embedded Software has been estimated using analytical approaches. This is effective, if good models of the processor/System-on-Chip (SoC) architecture exist. Unfortunately, modern high performance SoCs often contain unpredictable and/or undocumented components that influence the timing behaviour. Thus, analytical results for such processors are unrealistically pessimistic. One possible alternative approach seems to be hybrid WCET analysis, where measurement data together with an analytical approach is used to estimate worst-case behaviour. Previously, we demonstrated how continuous evaluation of basic block trace data can be used to produce detailed statistics of basic blocks in embedded software. In the meantime it has become clear that the trace data provided by modern SoCs delivers a different type of information. In this contribution, we show that even under realistic conditions, a meaningful analysis can be conducted with the trace data.
Cite as

Boris Dreyer, Christian Hochberger, Alexander Lange, Simon Wegener, and Alexander Weiss. Continuous Non-Intrusive Hybrid WCET Estimation Using Waypoint Graphs. In 16th International Workshop on Worst-Case Execution Time Analysis (WCET 2016). Open Access Series in Informatics (OASIcs), Volume 55, pp. 4:1-4:11, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2016)

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@InProceedings{dreyer_et_al:OASIcs.WCET.2016.4,
  author =	{Dreyer, Boris and Hochberger, Christian and Lange, Alexander and Wegener, Simon and Weiss, Alexander},
  title =	{{Continuous Non-Intrusive Hybrid WCET Estimation Using Waypoint Graphs}},
  booktitle =	{16th International Workshop on Worst-Case Execution Time Analysis (WCET 2016)},
  pages =	{4:1--4:11},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-95977-025-5},
  ISSN =	{2190-6807},
  year =	{2016},
  volume =	{55},
  editor =	{Schoeberl, Martin},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops.dagstuhl.de/entities/document/10.4230/OASIcs.WCET.2016.4},
  URN =		{urn:nbn:de:0030-drops-68977},
  doi =		{10.4230/OASIcs.WCET.2016.4},
  annote =	{Keywords: Hybrid Worst-Case Execution Time (WCET) Estimation for Multicore Processors, Real-time Systems}
}
Document
DOI: 10.4230/OASIcs.WCET.2015.45
Precise Continuous Non-Intrusive Measurement-Based Execution Time Estimation

Authors: Boris Dreyer, Christian Hochberger, Simon Wegener, and Alexander Weiss

Published in: OASIcs, Volume 47, 15th International Workshop on Worst-Case Execution Time Analysis (WCET 2015)

Abstract
Precise estimation of the Worst-Case Execution Time (WCET) of embedded software is a necessary precondition in safety critical systems. Static methods for WCET analysis rely on precise models of the target processor’s micro-architecture. Measurement-based methods, in contrast, rely on exhaustive measurements performed on the real hardware. The rise of the multicore processors often renders staticWCET analysis infeasible, either due to the computational complexity or due the lack of necessary documentation. Current approaches for (hybrid) measurement-based WCET estimation process the trace data offline and thus need to store large amounts of data. In this contribution, we present a novel approach that performs continuous online aggregation of timing measurements. This enables long observation periods and increases the possibility to catch rare circumstances. Moreover, we incorporate the execution contexts of basic blocks. We can therefore account for typical cache behaviour, without being overly pessimistic.
Cite as

Boris Dreyer, Christian Hochberger, Simon Wegener, and Alexander Weiss. Precise Continuous Non-Intrusive Measurement-Based Execution Time Estimation. In 15th International Workshop on Worst-Case Execution Time Analysis (WCET 2015). Open Access Series in Informatics (OASIcs), Volume 47, pp. 45-54, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2015)

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@InProceedings{dreyer_et_al:OASIcs.WCET.2015.45,
  author =	{Dreyer, Boris and Hochberger, Christian and Wegener, Simon and Weiss, Alexander},
  title =	{{Precise Continuous Non-Intrusive Measurement-Based Execution Time Estimation}},
  booktitle =	{15th International Workshop on Worst-Case Execution Time Analysis (WCET 2015)},
  pages =	{45--54},
  series =	{Open Access Series in Informatics (OASIcs)},
  ISBN =	{978-3-939897-95-8},
  ISSN =	{2190-6807},
  year =	{2015},
  volume =	{47},
  editor =	{Cazorla, Francisco J.},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops.dagstuhl.de/entities/document/10.4230/OASIcs.WCET.2015.45},
  URN =		{urn:nbn:de:0030-drops-52555},
  doi =		{10.4230/OASIcs.WCET.2015.45},
  annote =	{Keywords: Hybrid Worst-Case Execution Time (WCET) Estimation for Multicore Processors, Real-time Systems}
}
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