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Reconfigurable logic is known to have the potential to provide better solutions than direct ASIC implementations or processors in some situations. A necessary prerequisite for area advantages compared to ASICs or a better energy efficiency than processors is an application specific design of the reconfigurable unit. Adapting it to the specific requirements of an application helps to compensate for the area and speed penalty introduced by reconfigurability. The data paths of reconfigurable units are best suited for data flow oriented tasks, but for many applications, both control flow and data flow must be handled, so a integration of the reconfigurable unit into a processor environment is an appropriate choice. By analysing the existing design flow and integration possibilities for reconfigurable units, a basis for discussing possible automation schemes and a standardised interface is defined. Possible future research could investigate an automated design support for the building blocks of reconfigurable units and the definition of a standard processor interface for some classes of reconfigurable units.